HD74HC4518 Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – Dual BCD Use Converters/Dual Binary Up Converters

HD74HC4518, HD74HC4520
Dual BCD Up Counters
Dual Binary Up Counters
REJ03D0653–0200
(Previous ADE-205-542)
Rev.2.00
Mar 30, 2006
Description
The HD74HC4518 dual BCD counter and the HD74HC4520 dual binary counter consist of two identical, independent,
internally synchronous 4-stage counters. The counter stages are type D flip-flops, with interchangeable Clock and
Enable lines for incrementing on either the positive-going or negative-going transition as required when cascading
multiple stages. Each counter can be cleared by applying a high level on the Reset line. In addition, the HD74HC4518
will count out of all undefined states within two clock periods. These complementary MOS up counters find primary
use in multi-stage synchronous or ripple counting applications requiring low power dissipation and/or high noise
immunity.
Features
• High Speed Operation
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC4518P
HD74HC4520P
DILP-16 pin
PRDP0016AE-B
P
(DP-16FV)
HD74HC4518FPEL
SOP-16 pin (JEITA)
HD74HC4520FPEL
PRSP0016DH-B
(FP-16DAV)
FP
PRSP0016DG-A
HD74HC4520RPEL SOP-16 pin (JEDEC)
(FP-16DNV)
RP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (2,000 pcs/reel)
Function Table
Clock
L
X
H
X
Notes: 1. X: Don’t care
Enable
H
X
L
X
Reset
L
L
L
L
L
L
H
Operation
Increment counter
Increment counter
No change
No change
No change
No change
Q₀ to Q₃ = L
Rev.2.00, Mar 30, 2006 page 1 of 8