HD74HC393 Datasheet, PDF (1/7 Pages) Hitachi Semiconductor – Dual 4-bit Binary Counters

HD74HC393
Dual 4-bit Binary Counters
REJ03D0625-0200
(Previous ADE-205-504)
Rev.2.00
Mar 30, 2006
Description
The HD74HC393 contain two 4-bit ripple carry binary counters, which can be cascaded to create a single divide-by-256
counter.
The HD74HC393 is incremented on the high to low transition (negative edge) of the clock input, and each has an
independent clear input. When clear is set high all four bits of each counter are set to a low level. This enables count
truncation and allows the implementation of divide-by-N counter configurations.
Features
• High Speed Operation: t_pd (A to Q_A) = 16 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC393P
DILP-14 pin
PRDP0014AB-B
P
(DP-14AV)
HD74HC393FPEL SOP-14 pin (JEITA)
PRSP0014DF-B
FP
(FP-14DAV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Function Table
Clock
X
H
L
Note: 1. H; High level, L; Low level, X; Irrelevant
Clear
H
L
L
L
L
Outputs
L
No change
No change
No change
Advance to next state
Rev.2.00 Mar 30, 2006 page 1 of 6