HD26LS32A Datasheet, PDF (1/8 Pages) Hitachi Semiconductor – Quadruple Differential Line Receivers With 3 State Outputs

HD26LS32A
Quadruple Differential Line Receivers With 3 State Outputs
REJ03D0296–0200Z
(Previous ADE-205-578 (Z))
Rev.2.00
Jul.16.2004
Description
The HD26LS32A features quadruple line receivers designed to meet the specs of EIA standard RS-422A and RS-423.
This device operates from a single 5 V power supply. The enable function is common to all four receivers and offers a
choice of active high or active low input. Fail safe design ensures that if the inputs are open, the outputs will always be
high.
Features
• Ordering Information
Part Name
HD26LS32AP
Package Type Package Code
Package
Abbreviation
DILP-16 pin (JEITA) DP-16E, -16FV P
Taping Abbreviation
(Quantity)
—
Logic Diagram
1A
1B
1Y
2A
2Y
2B
3A
3Y
3B
4A
4Y
4B
Enable G
Enable G
Rev.2.00, Jul.16.2004, page 1 of 7