EC-1 Datasheet, PDF (1/58 Pages) Renesas Technology Corp – On-chip 32-bit ARM Cortex-R4F processor

Datasheet
EC-1
R01DS0289EJ0100
Rev.1.00
Sep 30, 2016
150 MHz, MCU with ARM Cortex^®-R4F, on-chip FPU, 249 DMIPS, EtherCAT, USB 2.0 high-speed,
CAN, various communications interfaces such as an SPI multi-I/O bus controller, and safety functions
Features
■ On-chip 32-bit ARM Cortex-R4F processor
• High-speed realtime control with maximum operating frequency of
150 MHz
Capable of 249 DMIPS
• On-chip 32-bit ARM Cortex-R4F (revision r1p4)
• Tightly coupled memory (TCM) with ECC: 512 Kbytes/32 Kbytes
• Instruction cache/data cache with ECC: 8 Kbytes per cache
• High-speed interrupt
• The FPU supports addition, subtraction, multiplication, division,
multiply-and-accumulate, and square-root operations at single-
precision and double-precision.
• Harvard architecture with 8-stage pipeline
• Supports the memory protection unit (MPU)
• ARM CoreSight architecture, includes support for debugging
through JTAG and SWD interfaces
■ Low power consumption
• Standby mode, and module stop function
■ Data transfer
• DMACAa: 16 channels × 2 units
■ Event link controller
• Module operations can be started by event signals rather than by
interrupt handlers.
• Linked operation of modules is available even while the CPU is in
the sleep state.
■ Reset and power supply voltage control
• Three reset sources including a pin reset
• Dual power-voltage configuration: 3.3 V (I/O unit), 1.2 V
(internal)
■ Clock functions
• Oscillator input frequency: 25 MHz
• CPU clock frequency: 150 MHz
• Low-speed on-chip oscillator (LOCO): 240 kHz
■ Independent watchdog timer
• Operated by a clock signal obtained by frequency-dividing the
clock signal from the low-speed on-chip oscillator: Up to 120 kHz
■ Safety functions
• Register write protection, input clock oscillation stop detection,
CRC, and IWDTa
• An error control module is incorporated to generate a pin signal
output, interrupt, or internal reset in response to errors originating
in the various modules.
PLBG0196GA-B 12x12mm, 0.8-mm pitch
■ Various communications interfaces
• EtherCAT slave controller: 2 ports
• USB 2.0 high-speed host/function : 1 channel
• CAN (compliant with ISO11898-1): 1 channel
• SCIFA with 16-byte transmission and reception FIFOs: 5 channels
• I²C bus interface: 1 channel for transfer at up to 400 kbps
• RSPIa: 2 channels
•
SPIBSC: Provides a single interface for multi-I/O compatible
serial flash memory
■ 8 extended-function timers
• 16-bit CMT (6 channels), 32-bit CMTW (2 channels)
■ General-purpose I/O ports
• 5-V tolerance, open drain, input pull-up
■ Multi-function pin controller
• The locations of input/output functions for peripheral modules are
selectable from among multiple pins.
■ Operating temperature range*¹
• Tj = -40°C to +125°C
Tj: Junction temperature
Note 1.
When the operating temperature (junction temperature) is 110°C or higher, refer to the precautions regarding the high-temperature operation on
the EC-1(R01AN3998).
R01DS0289EJ0100 Rev.1.00
Sep 30, 2016
Page 1 of 58