R8821 Datasheet, PDF (2/5 Pages) RDC Semiconductor – 16-BIT RISC MICROCONTROLLER

RDC®
RISC DSP Communication
R8821
16-BIT RISC MICROCONTROLLER
1. Features
l CPU Core
- RDC’s proprietary RISC architecture
- Five-stage pipeline
- CPU clock speed: 40MHz
- Supports CPU ID
- Supports 32 PIO pins
- Static & synthesizable design
l Bus Interface
- Multiplexed address and data bus
- Supports a non-multiplexed address bus A[19:0]
- 8-bit or 16-bit external bus dynamic access
l ROM/RAM/DRAM Controller and Addressing
Space
- 1M-byte memory address space
- 64K-byte I/O space
- With 8-bit or 16-bit boot ROM bus size
- Supports 64Kx16, 128Kx16, 256Kx16 EDO or FP
DRAM with auto-refresh control
l Two independent DMA channels
l Asynchronous Serial Channels
- Supports two asynchronous serial channels with
hardware handshaking signals
l Interrupt Controller
- The Interrupt controller with seven maskable
external interrupts and one non-maskable
external interrupt
l Programmable Chip-select Logic
- Programmable chip-select logic for memory or
I/O bus cycle decoder
l Programmable Wait-state Generators
l Counters/Timers
- Three independent 16-bit timers and one
independent programmable watchdog timer
l Software Compatible with the 80C186
Microprocessor
l Operating Voltage Range
- Core voltage: 5V ± 10%
- I/O voltage: 5V ± 10%
l Ambient Temperature: 0 ~ +70°C
l Package Type
-100-pin PQFP & 100-pin LQFP
Specifications subject to change without notice, contact your sales representatives for the most update information.
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REV 1.0 Jul.11 2006