RE46C140 Datasheet, PDF (9/12 Pages) Microchip Technology – CMOS Photoelectric Smoke Detector ASIC with Interconnect and Timer Mode

RE46C140
CMOS Photoelectric Smoke Detector ASIC with Interconnect and Timer Mode
Product Specification
R&E International
Low Battery and Chamber Test – In standby an internal reference is compared to the voltage divided VDD supply.
Low battery status is latched at the conclusion of the LED pulse. The horn will chirp for 10ms every 43 seconds
until the low battery condition no longer exists. In standby a chamber test is also performed every 40 seconds by
switching to the high gain capacitor C1 and sensing the photo chamber background reflections. Two consecutive
chamber tests failures will also cause the horn to chirp for 10mS every 43 seconds. The low battery chirp occurs
next to the LED pulse and the failed chamber test chirp ~20 seconds later. The low battery and chamber tests are
not performed in a local or remote alarm condition.
Timer Mode – If resistors R_adj1 and R_adj2 are in place and a high to low transition occurs on the TEST input the
device enters a 10 minute timer mode. In this mode the smoke comparator reference is switched from the internal
VDD-3.5V reference to the voltage that appears on VSEN (pin 15). This allows the sensitivity to be modified for
the duration of the 10 minute timer period. The chamber test is performed in the timer mode. If VSEN is left
unconnected or tied to VSS the timer mode of operation is inhibited.
Diagnostic Mode – In addition to the normal function of the TEST input a special diagnostic mode is available for
calibration and test of the smoke detector. Taking the TEST pin below VSS and sourcing ~300uA out of the pin
for 1 clock cycle will enable the diagnostic mode. In the diagnostic mode some of the pin functions are redefined.
Refer to the table below for redefined pin functions in the diagnostic mode. In addition in this mode STROBE is
always enabled and the IRED is pulsed at the clock rate of 10.5mS nominal.
Pin Name
IO
VSEN
FEED
COSC
HORNB
LED
Pin Number
7
15
10
12
8
11
Description
Disabled as an output. A high on this pin directs the photo amplifier output to pin C1
(1) or C2 (2), determined by the level on VSEN (15). Amplification occurs during the
IRED active time.
If IO is high then this pin controls the gain capacitor that is used. If VSEN is low then
normal gain is selected and the photo amp output appears on C1 (1). If VSEN is
high then high gain is selected and the photo amp output is on C2 (2).
If VSEN (15) is low then taking this input high will enable hysteresis which is a
nominal 10% gain increase in normal gain mode.
If desired this pin can be driven by an external clock.
This pin becomes the smoke integrator output. A high level indicates that an alarm
condition has been detected.
The LED pin is used as a low battery indicator. For VDD above the low battery
threshold the open drain NMOS is off. If VDD falls below the threshold the NMOS
turns on.
Telephone [phone]
Facsimile 610.992.0734
E-mail: [e-mail]
Page 9 of 12
DS-RE46C140-121806
This datasheet contains PROPRIETARY and CONFIDENTIAL information.