FM3808_06 Datasheet, PDF (1/27 Pages) Ramtron International Corporation – 256Kb Bytewide FRAM w/ Real-Time Clock

Preliminary
FM3808
256Kb Bytewide FRAM w/ Real-Time Clock
Features
System Supervisor Function
256K bit Ferroelectric Nonvolatile RAM
• Programmable Clock/Calendar Alarm
• Organized as 32,752 x 8 bits
• High Endurance 100 Billion (10¹¹) Read/Writes
• Programmable Watchdog Timer
• Power Supply Monitor
• 10 year Data Retention
• Interrupt Output - Programmable Active
• NoDelay™ Writes
High/Low
• 70 ns Access Time/ 130 ns Cycle Time
• Built-in Low V_DD Protection
D _{Real-Time Clock/Calendar Function}
E _{• Clock Registers in Top 16 bytes of Address Space}
• Battery Backed Power
D _{• Tracks Seconds through Centuries in BCD Format}
N ^S • Tracks Leap Years through 2099
E ^{N • Runs from a 32.768 kHz Timekeeping Crystal}
• Control Settings Inherently Nonvolatile
• Generates either Processor Reset or Interrupt
Low Power Operation
• 5V Operation for Memory and Clock Interface
• Backup Voltage as low as 2.5V
• 25 mA I_DD Active Current
• 1 µA I_BAK Clock Backup Current
M IG _{006 Description}
M ^{S 2} ₀₅ ^{The FM3808 combines a 256Kb FRAM array with a}
O ^{E t. t 0 real-time clock and a system supervisor function. An}
p ^{n 4 external 32.768 kHz crystal drives the timekeeping}
C ^{D e e M function. It maintains time and date settings in the}
S ^{m F absence of system power through the use of a backup}
E _{W :} ^{e +} battery power source. Data in the memory array does
R ^{y c 8 not depend on the backup source, it remains}
E ^u _pla ^{80 nonvolatile in FRAM. In addition to timekeeping, the}
T ^{B e 1 FM3808 includes a system supervisor to manage low}
N _{e R M VDD power conditions and a watchdog timer function.}
O ^{t F A programmable interrupt output pin allows the user}
R _im ^{c : to select the supervisor functions and the polarity of}
N _{O T ire} ^{n the signal.}
F st _o ^{D lutio Both the FRAM array and the timekeeping function}
a ^{o are accessed through the memory interface. The}
L ^{N S upper 16-address locations of the memory space are}
te ^{allocated to the timekeeping registers rather than to}
memory. The FRAM array provides data retention
rna ^{for 10 years in the absence of system power, and is}
not dependent on the backup power source for the
lte ^{clock. This eliminates system concerns over data loss}
A ^{in a traditional battery-backed RAM solution. In}
Pin Configuration
A11
1
A9
2
A8
3
A13
4
WE
5
VBAK
6
INT
7
VDD
8
X1
9
X2
10
A14
11
A12
12
A7
13
A6
14
A5
15
A4
16
32
OE
31
A10
30
CE
29
DQ7
28
DQ6
27
DQ5
26
DQ4
25
DQ3
24
VSS
23
DQ2
22
DQ1
21
DQ0
20
A0
19
A1
18
A2
17
A3
Ordering Information
FM3808-70-T 70 ns access, 32-pin TSOP
FM3808DK
DIP module development kit
Documentation for the DIP module development kit is
available separately.
addition, clock and supervisor control settings are
implemented in FRAM rather than battery-backed
RAM, making them more dependable. The FM3808
offers guaranteed operation over an industrial
temperature range of -40°C to +85°C.
This is a product in sampling or pre-production phase of develop-
ment. Characteristic data and other specifications are subject to
change without notice.
Rev. 1.3 (EOL)
Feb. 2006
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, [phone]
www.ramtron.com
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