RMX2_12 Datasheet, PDF (5/12 Pages) Radiometrix Ltd – NBFM Direct Interface Multi Channel Transceiver

up to 1200MHz
VCO
LPF
+2.8V
Reference Oscillator
21.25MHz
Fin
CLK
Xf in
Data
GND
LE
D0
PS
VCC
ZC
Vp
LD/f out
OSC out
P
OSC in
R
2.2kΩ
2.2kΩ
2.2kΩ
CLK
DATA
LE
2.2kΩ
LD
RMX2-XXX-10
Control pin name
Figure 4: PLL IC Control
RMX2 has an internal PLL frequency synthesizer as shown in Figure 1. Channel frequency is set by loading
data directly into the registers of the controlling IC over a simple, 3 wire serial bus (interface pins CLK, LE,
DATA). Also RMX2 has a Lock Detect (LD) terminal that shows the lock status of the frequency. These
signal lines are connected directly to the PLL IC through a 2.2kΩ resistor.
The interface voltage of RMX2 is 2.8 V, so the control voltage must be the same. RMX2 comes equipped
with a Fujitsu MB15E03SL PLL IC. Please refer to the manual of the PLL IC.
http://www.fujitsu.com/downloads/MICRO/fme/pll/e421359.pdf
The following is a supplementary description related to operation with RMX2. In this description, the same
names and terminology as in the PLL IC manual are used, so please read the manual beforehand.
How to calculate the setting values for the PLL register
The PLL IC manual shows that the PLL frequency setting value is obtained with the following equation.
f_VCO
=
[(M
× N ) + A]×
R
f _OSC
N > M²
Equation 1
f_vco : Output frequency of external Voltage Controlled Oscillator (VCO)
N: Preset divide ratio of binary 11-bit programmable counter (3 to 2,047)
A: Preset divide ratio of binary 7-bit swallow counter (0 ≤ A ≤ 127)
f_osc: Output frequency of the reference frequency oscillator
R: Preset divide ratio of binary 14-bit programmable reference counter (3 to 16,383)
M: Preset divide ratio of the dual modulus prescaler (64 or 128)
Because of the circuitry used in the RMX2, the frequency programmed into the PLL must be 21.7MHz below
the desired channel frequency. There is no need to re-program when switching between transmit and
receive modes.
Therefore the expected value of the frequency generated at VCO (fexpect) is as below.
fvco = fexpect = (fch – 21.7MHz)
Equation 2
The PLL generates channel frequencies as multiples of a 'comparison' frequency. This phase comparison
frequency (fcomp) is made by dividing the frequency input to the PLL from the reference oscillator by
reference counter R. The RMX2 uses a 21.25 MHz TCXO for the reference clock fosc.
fcomp can be either 12.5kHz or 25 kHz.
The above equation 1 results in the following with n = M x N + A, where “n” is the number for division.
f_VCO = n × f _comp
Equation 3
Radiometrix Ltd
RMX2 Data sheet
Page 5/12