HYB25DC128800C Datasheet, PDF (17/32 Pages) Qimonda AG – 128-Mbit Double-Data-Rate SDRAM

Internet Data Sheet
HYB25DC128[800/160]C[E/F]
128-Mbit Double-Data-Rate SDRAM
Current State CS RAS CAS WE Command
Action
Note
Read (With Auto L
Precharge)
L
L H H Active
H L H Read
Select and activate row
1) to 6)
Select column and start new Read burst ^{1) to 7),9)}
L H L L Write
Select column and start Write burst
1) to 7),9),10)
L L H L Precharge
—
1) to 6)
Write (With Auto L
Precharge)
L
L H H Active
H L H Read
Select and activate row
Select column and start Read burst
1) to 6)
1) to 7),9)
L H L L Write
Select column and start new Write burst ^{1) to 7),9)}
L L H L Precharge
—
1) to 6)
1) This table applies when CKE n-1 was HIGH and CKE n is HIGH (see Table 11: Clock Enable (CKE) and after t_XSNR/t_XSRD has been met (if
the previous state was self refresh).
2) This table describes alternate bank operation, except where noted, i.e., the current state is for bank n and the commands shown are those
allowed to be issued to bank m (assuming that bank m is in such a state that the given command is allowable). Exceptions are covered in
the notes below.
3) Current state definitions: Idle: The bank has been precharged, and t_RP has been met. Row Active: A row in the bank has been activated,
and t_RCD has been met. No data bursts/accesses and no register accesses are in progress. Read: A Read burst has been initiated, with
Auto Precharge disabled, and has not yet terminated or been terminated. Write: A Write burst has been initiated, with Auto Precharge
disabled, and has not yet terminated or been terminated. Read with Auto Precharge Enabled: See ¹⁰⁾. Write with Auto Precharge Enabled:
See ¹⁰⁾.
4) AUTO REFRESH and Mode Register Set commands may only be issued when all banks are idle.
5) A BURST TERMINATE command cannot be issued to another bank; it applies to the bank represented by the current state only.
6) All states and sequences not shown are illegal or reserved.
7) Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads or Writes with
Auto Precharge disabled.
8) Requires appropriate DM masking.
9) Concurrent Auto Precharge:This device supports “Concurrent Auto Precharge”. When a read with auto precharge or a write with auto
precharge is enabled any command may follow to the other banks as long as that command does not interrupt the read or write data
transfer and all other limitations apply (e.g. contention between READ data and WRITE data must be avoided). The minimum delay from
a read or write command with auto precharge enable, to a command to a different banks is summarized in Table 14.
10) A Write command may be applied after the completion of data output.
From Command
WRITE w/AP
Read w/AP
To Command (different bank)
Read or Read w/AP
Write to Write w/AP
Precharge or Activate
Read or Read w/AP
Write or Write w/AP
Precharge or Activate
TABLE 14
Truth Table 5: Concurrent Auto Precharge
Minimum Delay with Concurrent Auto Unit
Precharge Support
1 + (BL/2) + t_WTR
t_CK
BL/2
t_CK
1
t_CK
BL/2
t_CK
CL (rounded up) + BL/2
t_CK
1
t_CK
Rev. 1.1, 2007-01
17
03062006-JXUK-E7R1