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P4C1023 Datasheet, PDF (7/11 Pages) Pyramid Semiconductor Corporation – LOW POWER 128K x 8 SINGLE CHIP ENABLE CMOS STATIC RAM
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DATA RETENTION
Symbol
Parameter
Test Conditions
VDR
VCC for Data Retention
ICCDR
tCDR
Data Retention Current
Chip Deselect to Data
Retention Time
CE ≥ VCC -0.2V,
VIN ≥ VCC -0.2V or VIN ≤ 0.2V
VDR = 2.0V
VDR = 3.0V
See Retention Waveform
tR
Operating Recovery Time
1. CE1 ≥ VDR -0.2V, CE2 ≥ VDR -0.2V or CE2 ≤ 0.2V; or CE1 ≤ 0.2V, CE2 - 0.2V; VIN ≥ VDR -0.2V or VIN ≤ 0.2V
P4C1023/P4C1023L
Min Max Unit
2.0
5.5
V
50 µA
100 µA
0
ns
tRC
ns
LOW VCC DATA RETENTION WAVEFORM
Document # SRAM126 REV OR
Page 7 of 11
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