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PY264 Datasheet, PDF (5/8 Pages) Pyramid Semiconductor Corporation – 8K X 8 REPROGRAMMABLE PROM | |||
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AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Level
Output Timing Reference Level
Output Load
GND to 3.0V
3ns
1.5V
1.5V
See Figures 1 and 2
PY264
Figure 1. Output Load
* including scope and test fixture.
Note:
Because of the ultra-high speed of the PY264, care must be taken when
testing this device; an inadequate setup can cause a normal functioning
part to be rejected as faulty. Long high-inductance leads that cause
Figure 2. Thevenin Equivalent
supply bounce must be avoided by bringing the VCC and ground planes
directly up to the contactor fingers. A 0.01 µF high frequency capacitor
is also required between VCC and ground.
Document # EPROM102 REV OR
Page 5 of 8
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