|
ANDPSI089C362S Datasheet, PDF (4/6 Pages) Purdy Electronics Corporation – 8.90” WSVGA Color p-Si TFT LCD Module | |||
|
◁ |
Displays
ANDpSi0089C362S
Timing Speciï¬cations (see Notes below)
Signal
NCLK
HSYNC
VSYNC
â
â
DATA
DE
Item
Frame Period
Frequency
high Time
Low Time
Setup to NCLK
Pulse Width
Pulse Width
VSYNC to DATA
Setup to HSYNC
Line Period
Horizontal Display Time
Frame Frequency
Frame Period
Vertical Display Time
Setup
Hold
Setup
Hold
Display Start
Symbol
ts
1/ts
tsh
tsl
tls
tlw
tfw
tfd
tï¬
tlpd=tlpl
thd
1/tfpd
tfpd=tfpf
tvd
tds
tdh
tdrs
tdrh
tdrds
Min
19.0
â
6
7
7
8 x ts
3 x tlpd
7 x tlpd
16
1320 x ts
25.08
1024 x ts
56
610 x tlpd
600 x tlpd
5
7
10
10
â
Typ
19.84
50.4
â
â
â
â
â
â
â
1344 x ts
26.67
1024 x ts
60
625 x tlpd
600 x tlpd
â
â
â
â
â
Max
â
52.6
â
â
â
â
7 x tlpd
â
â
1344 x ts
1024 x ts
â
635 x tlpd
600 x tlpd
â
â
â
â
400 x ts
Unit
ns
MHz
ns
ns
ns
â
â
â
ns
â
µs
â
Hz
â
â
ns
ns
ns
ns
â
Notes:
Refer to âTiming Chartâ below. If NCLK is ï¬xed to âHâ or âLâ level for certain period while VDD is supplied, the panel may be damaged. Please adjust
LCD operating signal timing and FL driving frequency, to optimized the display quality. There is a possibility that ï¬icker is observed by the interference
of LCD operating signal ï¬ring and FL driving condition (especially driving frequency), even if the condition satisï¬ed above timing speciï¬cations. Do
not make tv, tvhd and tvds ï¬uctuate. If tv, tvhd, and tvds are ï¬uctuating, the panel displays black. In case of using the long frame period, the deteriora-
tion of display quality, noise, etc., may be occurring. NCLK count of each Horizontal Scanning Time should always be the same. V-Blanking period
should be ânâ X âHorizontal Scanning Timeâ. (n:integer) Frame period should always be the same.
Timing Chart
Purdy Electronics Corporation ⢠720 Palomar Avenue ⢠Sunnyvale, CA 94085
4
Tel: 408.523.8216 ⢠Fax: 408.733.1287 ⢠sales@purdyelectronics.com
1/28/08
www.purdyelectronics.com
|
▷ |