AND1021ST Datasheet, PDF (4/4 Pages) Purdy Electronics Corporation – Intelligent Graphics Display

Block Diagram
8
D0-D7
WR
RD
CE
C/D
RESET
HALT
V_EL
V_EL
Dimensional Outline
AND1021ST/-EO
Intelligent Graphics Display
8
Because signal lines are directly connected
D0-D7
I/O0-I/O7 ^{to C-MOS and are not pull-up or pull-down}
internally, except RESET which is pull-up to
RAM
12
AD0-AD12
A0-A11
V_DD, you must guard all signals from
external noise.
R/W
R/W
CE
CE1
T6963C
HSCP
FR
LP
CDATA
X-Driver
X-Driver
Control Lines
60
60
64
Y-Driver
LCD
Backlight
EL Option Only
Ground
V_EL
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
7/20/07
Tel: [phone] • Fax: [phone] • [e-mail] • www.purdyelectronics.com
4