PCS2I99446 Datasheet, PDF (9/14 Pages) PulseCore Semiconductor – 2.5V and 3.3V LVCMOS Clock Distribution Buffer

September 2006
rev 0.5
Power Consumption of the PCS2I99446 and
Thermal Management
The PCS2I99446 AC specification is guaranteed for the
entire operating frequency range up to 250MHz. The
PCS2I99446 power consumption and the associated
long-term reliability may decrease the maximum
frequency limit, depending on operating conditions such
as clock frequency, supply voltage, output loading,
ambient temperature, vertical convection and thermal
conductivity of package and board. This section
describes the impact of these parameters on the junction
temperature and gives a guideline to estimate the
PCS2I99446 die junction temperature and the associated
device reliability.
Table 11. Die junction temperature and MTBF
Junction temperature (°C)
MTBF (Years)
100
20.4
110
9.1
120
4.2
130
2.0
Increased power consumption will increase the die
junction temperature and impact the device reliability
(MTBF). According to the system-defined tolerable
MTBF, the die junction temperature of the PCS2I99446
needs to be controlled and the thermal impedance of the
board/package should be optimized. The power
dissipated in the PCS2I99446 is represented in
equation 1.
PCS2I99446
Where I_CCQ is the static current consumption of the
PCS2I99446, C_PD is the power dissipation capacitance
per output, (Μ)ΣC_L represents the external capacitive
output load, N is the number of active outputs (N is
always 12 in case of the PCS2I99446). The PCS2I99446
supports driving transmission lines to maintain high signal
integrity and tight timing parameters. Any transmission
line will hide the lumped capacitive load at the end of the
board trace, therefore, ΣC_L is zero for controlled
transmission line systems and can be eliminated from
equation 1. Using parallel termination output termination
results in equation 2 for power dissipation.
In equation 2, P stands for the number of outputs with a
parallel or thevenin termination, V_OL, I_OL, V_OH and I_OH are
a function of the output termination technique and DC_Q is
the clock signal duty cycle. If transmission lines are used
ΣCL is zero in equation 2 and can be eliminated. In
general, the use of controlled transmission line
techniques eliminates the impact of the lumped capacitive
loads at the end lines and greatly reduces the power
dissipation of the device. Equation 3 describes the die
junction temperature T_J as a function of the power
consumption.
Where R_thja is the thermal impedance of the package
(junction to ambient) and T_A is the ambient temperature.
According to Table 11, the junction temperature can be
used to estimate the long-term device reliability. Further,
combining equation 1 and equation 2 results in a
maximum operating frequency for the PCS2I99446 in a
series terminated transmission line system, equation 4.
2.5V and 3.3V LVCMOS Clock Distribution Buffer
Notice: The information in this document is subject to change without notice.
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