PCS2I9940L Datasheet, PDF (5/13 Pages) PulseCore Semiconductor – Low Voltage 1:18 Clock Distribution Chip

September 2006
rev 1.1
Table 7. DC Characteristics (T_A = -40° to +85°C, V_CCI = 3.3V ± 5%, V_CCO = 2.5V ± 5%)
Symbol
Characteristic
Min
Typ
V_IH
Input HIGH Voltage
CMOS_CLK
2.4
V_IL
V_PP
V_CMR
Input LOW Voltage
Peak–to–Peak Input
Voltage
Common Mode Range
CMOS_CLK
PECL_CLK
PECL_CLK
500
V_CC-1.4
V_OH
Output HIGH Voltage
1.8
V_OL
Output LOW Voltage
I_IN
Input Current
C_IN
Input Capacitance
4.0
C_pd
Power Dissipation Capacitance
10
Z_OUT
Output Impedance
23
I_CC
Maximum Quiescent Supply Current
0.5
PCS2I9940L
Max
V_CCI
0.8
1000
V_CC-0.6
0.5
±200
1.0
Unit
V
V
mV
V
V
V
µA
pF
pF
Ω
mA
Condition
I_OH = -20mA
I_OH = 20mA
per output
Table 8. AC Characteristics (T_A =-40° to +85°C, V_CCI = 3.3V ± 5%, V_CCO = 2.5V ± 5% )
Symbol
Characteristic
Min Typ
F_max
Maximum Input Frequency
t_PLH
Propagation Delay
PECL_CLK < 150MHz 2.0 2.8
CMOS_CLK < 150MHz 1.7 2.5
t_PLH
Propagation Delay
PECL_CLK > 150MHz 2.0 2.9
CMOS_CLK > 150MHz 1.8 2.5
t_sk(o)
Output-to-output Skew
PECL_CLK
CMOS_CLK
t_sk(pp)
t_sk(pp)
Part–to–Part Skew
Part–to–Part Skew
PECL_CLK < 150MHz
CMOS_CLK < 150MHz
PECL_CLK > 150MHz
CMOS_CLK > 150MHz
t_sk(pp)
Part–to–Part Skew
PECL_CLK CMOS_CLK
DC
Output Duty Cycle
f_CLK < 134 MHz 45
50
f_CLK <250 MHz 40
50
t_r, t_f
Output Rise/Fall Time
0.3
Note: 1.Tested using standard input levels, Production tested @ 150MHz.
2. Across temperature and voltage ranges, includes output skew.
3. For a specific temperature and voltage, includes output skew.
Max
250
3.5
3.0
3.8
3.3
Unit
MHz
nS
nS
150
150
pS
1.5
1.3
nS
1.8
1.5
nS
850
750
pS
55
%
60
%
1.2
nS
Condition
Note¹.
Note¹
Notes^1,2
Notes^1,2
Notes^1,3
Input DC = 50%
Input DC = 50%
0.5 - 1.8 V
Low Voltage 1:18 Clock Distribution Chip
Notice: The information in this document is subject to change without notice.
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