PE9303 Datasheet, PDF (2/9 Pages) Peregrine Semiconductor Corp. – 3.5 GHz Low Power CMOS Divide-by-8 Prescaler For RAD-Hard Applications

Figure 3. Pin Configuration
VDD ¹
IN
2
DEC 3
GND 4
PE9303
8 _GND
7 _OUT
6 _GND
5 GND
Table 2. Pin Descriptions
Pin No.
1
2
Pin
Name
VDD
IN
Description
Power supply pin. Bypassing is required.
Input signal pin. Should be coupled with a
capacitor (eg 15 pF).
Power supply decoupling pin. Place
3
DEC
capacitors as close as possible and connect
directly to the ground plane (eg 10 nF &
10 pF).
Ground pin. Ground pattern on the board
4
GND should be as wide as possible to reduce
ground impedance.
5
GND Ground pin
6
GND Ground pin
Divided frequency output pin. This pin should
7
OUT be coupled with a capacitor
(eg 100 pF).
8
GND Ground Pin
PE9303
Product Specification
Table 3. Absolute Maximum Ratings
Symbol
VDD
Parameter/Conditions
Supply voltage
Min Max Units
4.0
V
T_ST
T_OP
VESD
P_INMAX
Storage temperature range -65 150
°C
Operating temperature
range
-40 85
°C
ESD voltage (Human Body
Model)
250
V
Maximum input power
10 dBm
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Functional
operation should be restricted to the limits in the
DC Electrical Specifications table. Exposure to
absolute maximum ratings for extended periods
may affect device reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS^® device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS^®
devices are immune to latch-up.
©2003-2012 Peregrine Semiconductor Corp. All rights reserved.
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Document No. 70-0052-02 │ UltraCMOS^® RFIC Solutions