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PLC497_15 Datasheet, PDF (6/9 Pages) Protek Devices – ULTRA LOW CAPACITANCE STEERING DIODE
Only One Name Means ProTek’Tion™
APPLICATION INFORMATION
Line 1 In
Line 1 Out
1
2
3
3
2
1
Line 2 In
FIGURE 1 - DIFFERENTIAL MODE I/O PORT PROTECTION
Two PLC497 devices used in parallel. Circuit connectivity is as follows:
• Pins 1 and 2 of each device connected to data lines.
• Pin 3 not connected.
Line 2 Out
PLC497
1
2
3
3
2
1
1
2
3
3
2
1
FIGURE 2 - COMMON MODE SENSOR CIRCUIT PROTECTION
Two PLC497 devices used in parallel. Circuit connectivity is as follows:
• Pin 1 on each device connected to data lines.
• Pin 2 on each device connected to ground.
• Pin 3 not connected.
CIRCUIT BOARD RECOMMENDATIONS
Circuit board layout is critical for electromagnetic compatibility protection. The following guidelines are recommended:
• The protection device should be placed near the input terminals or connectors, the device will divert the transient current
immediately before it can be coupled into the nearby traces.
• The path length between the TVS device and the protected line should be minimized.
• All conductive loops including power and ground loops should be minimized.
• The transient current return path to ground should be kept as short as possible to reduce parasitic inductance.
• Ground planes should be used whenever possible. For multilayer PCBs, use ground vias.
05100.R9 9/12
Page 6
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