PA5322 Datasheet, PDF (1/17 Pages) Protek Devices – 100dB, 24-Bit, 192 kHz Stereo Audio CODEC

ANALOG PRODUCTS DIVISION
PA5322
100dB, 24-Bit, 192 kHz Stereo Audio CODEC
FEATURES
GENERAL DESCRIPTION
ADC and DAC:
 100 dB dynamic range
 –90 dB THD
 8 kHz to 200 kHz sampling frequency
 I²S, left justified and right justified audio data format, 16-
24 bits
 128, 192, 256, 384, 512, 768 and 1024 MCLK to LRCK
ratios
 Independent ADC and DAC sampling frequencies and
clocks
 Advanced multi-bit delta-sigma with low sensitivity to
clock jitter
 Single power supply from 3V to 5.5V
 Hardware mode or SPI or 2-wire uC interface
ADC:
 4-to-1 MUX for analog inputs
 Direct 2 V_RMS analog input
 ADC PGA from 11.5 dB to –11.5 dB in 0.5 dB per step
 Digital attenuation from 6.5 dB to 89.5 dB in 0.5 dB per
step
 Optional high pass filter to remove analog DC offset
DAC:
 Digital volume control from 0 dB to 120 dB attenuation in
0.5 dB per step, with soft ramp and zero crossing
transition
 De-emphasis filter for 32, 44.1 and 48 kHz sampling
frequencies
 Selectable fast and slow roll-off filters
 95 dB dynamic range
 -85 dB THD+N
 Up to 200 kHz sampling frequency
 I²S audio data format, 16-24 bits
 Single power supply 4.5 V to 5.5V
5KΩ
APPLICATIONS
 DVD recorder
 Personal video recorder
 LCD and digital TVs
 Car audio
 AV receiver
A_IN1L/R
A_IN2L/R
A_IN3L/R
A_IN4L/R
Input
MUX/MIX
PA5322 is a low cost high performance stereo audio CODEC.
PA5322 performs stereo digital to analog conversion and
analog to digital conversion continuously from 8 kHz to 200
kHz sampling frequency. PA5322 is ideal for high
performance cost sensitive consumer audio applications.
PA5322 can accept I²S; left justified and right justified serial
audio data formats up to 24-bit word length. ADC and DAC
operate on independent sampling frequencies and clocks. The
device uses advanced multi-bit (∆-∑) delta-sigma modulation
technique to convert data between digital and analog.
The multi-bit (∆-∑) delta-sigma modulators makes the device
with low sensitivity to clock jitter and low out of band noise.
PA5322 can operate either in the hardware mod or the
software mode. In the hardware mode, pin M0, M1, M2 and
M3 set the operation of the device. In the software mode,
PA5322 provides SPI or 2-wire micro-controller interfaces to
configure its operations.
BLOCK DIAGRAM
µC Interface
PGA
Multilevel
Sigma Delta ADC
ADC
Clock Manager
DSP
ADC
Serial Port
ADCMCLK
ADCSDOUT/M3
ADCLRCK
ADCSCLK
DACSDIN
DACLRCK
DACSCLK
DAC
Serial Port
5KΩ
DSP
Multilevel
Sigma Delta DAC
Output Amp
Low Pass Filter
AOUTL
AOUTR
DACMCLK
DAC
Clock Manager
ORDERING INFORMATION
Temperature Range Package
-40 to 85 °C
SSOP-28
Part Number
PA5322-T7
561 E. Elliot Road #175 Chandler, AZ 85225 Tel: [phone]. Fax: [phone]
95248 Rev.0. 01/10
www.protekanalog.com
NOT FOR USE IN LIFE SUPPORT SYSTEMS