PG12864LRU Datasheet, PDF (9/32 Pages) Powertip Technology – LCD Module

NO.PG12864LRU-ORA-H Rev:0
(MPU timing characteristics)
(VDD=2.7 to 5.5V,Ta=-30 to +85 )
Item
Address hold time
Address setup time
System cycle time
Road pulse width (READ)
Write pulse width (WRITE)
Data setup time
Data hold time
Read data output delay time
Read data hold time
Input signal rise and fall time
Symbol Mesauring condition MIN MAX Unit Appllcable pin
tAH8
60
ns
CSB
tAS8
40
ns
RS
tCYC8
450
ns
RDB
tRDW8
270
ns
WRB
tWRW8
100
ns
tDS8
100
ns
D0 to D7
tDH8
40
ns
tRDD8
CL=15pF
220 ns
D0 to D7
tRDH8
10
ns
tr,tf
30 ns All of above pins
(VDD=2.4 to 2.7V,Ta=-30 to +85 )
Item
Address hold time
Address setup time
System cycle time
Road pulse width (READ)
Write pulse width (WRITE)
Data setup time
Data hold time
Read data output delay time
Read data hold time
Input signal rise and fall time
Symbol Mesauring condition MIN MAX Unit
tAH8
80
ns
tAS8
80
ns
tCYC8
900
ns
tRDW8
500
ns
tWRW8
200
ns
tDS8
200
ns
tDH8
80
ns
tRDD8
CL=15pF
320 ns
tRDH8
10
ns
tr,tf
30 ns
Appllcable pin
CSB
RS
RDB
WRB
D0 to D7
D0 to D7
All of above pins
. (VDD=1.8 to 2.4V,Ta=-30 to +85 )
Item
Symbol Mesauring condition MIN MAX Unit
Address hold time
tAH8
160
ns
Address setup time
tAS8
160
ns
System cycle time
tCYC8
1800
ns
Road pulse width (READ) tRDW8
1000
ns
Write pulse width (WRITE) tWRW8
400
ns
Data setup time
tDS8
400
ns
Data hold time
tDH8
160
ns
Read data output delay time tRDD8
CL=15pF
640 ns
Read data hold time
tRDH8
10
ns
Input signal rise and fall time
tr,tf
30 ns
Note:All the timings must be specified relative to 20% and 80% of VDD voltage
Appllcable pin
CSB
RS
RDB
WRB
D0 to D7
D0 to D7
All of above pins
POWERTIP TECHNOLOGY CORPORATION
DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN