DPA425PN Datasheet, PDF (12/20 Pages) Power Integrations, Inc. – DC-DC Forward Converter Design Guide Application Note AN-31

AN-31
60
1-Gain
50
40
30
1-Phase
20
56 dB Loop Gain
Z1
0 Degrees Phase
180 Degrees Phase Margin
PI-2878-032603
270
240
Z2
Z3 Z4
210
180
150
10
Gain Margin
120
20 dB
0
0 dB Gain
90
-10
60
-20
-30
-40
P1
-50
180 Degrees Phase
0 Degrees Phase Margin
P2
Phase Margin
60 Degrees
P3
P4
30
0
-30
P5
P6
-60
-60
0.1
1
10
100
1k
Frequency (Hz)
-90
10 k
100 k
Figure 10. Gain and Phase of a Typical Feedback Loop for DC-DC Forward Converter with DPA-Switch. Markers Show Locations of Major
Poles and Zeros.
required for tight DC voltage regulation. Not shown in the
circuit diagram is the ESR of the output capacitors. The ESR
is also an important element in the frequency compensation of
the feedback loop.
Output LC Filter
The filter formed by the output inductor and the output capacitors
contributes two poles to the loop response at the filterʼs resonant
frequency. Since the filter is a resonant circuit with relatively
low loss, the gain and phase change rather abruptly near the
resonant frequency. Consequently, the poles and zeros for
shaping the loop response should either avoid this region or
compensate for the resonance.
Proper placement of the resonant frequency of the output
filter will avoid complications in the design of the feedback
loop. The position of the resonant frequency should allow the
designer to shape the desired response with a limited number of
compensation components of reasonable size. The recommended
resonant frequency for an output filter that uses low ESR
tantalum capacitors in a forward converter with DPA-Switch
and optocoupler feedback is between 4 kHz and 6 kHz. This
value is consistent with the inductor and capacitor values for
desirable ripple current and ripple voltage.
12 C
7/04
The output capacitor ESR contributes a zero that compensates for
one of the poles from the filter. However, for low ESR tantalum
or organic electrolyte capacitors, this zero usually occurs too
high in frequency to substantially offset the effects of the filter
within the desired loop bandwidth. In the prototype example, the
output filter capacitors are 100 µF, with a maximum specified
ESR of 100 milliohms. The ESR zero is thus at approximately
16 kHz, well beyond the 4 kHz LC filter resonant frequency.
Actual ESR is approximately 80 milliohms, placing the zero
typically at 20 kHz. In situations where standard low ESR
electrolytic capacitors can be used, the higher ESR may place
the ESR zero at a sufficiently low frequency to add significant
additional phase margin.
DPA-Switch Compensation
The network of C6 and R4 at the CONTROL pin of DPA-Switch
provides compensation for the feedback loop in addition to
other functions. The capacitance of C6 with R4 and its own
ESR plus the impedance of the CONTROL pin impedance
provide a pole in the loop gain, followed by a zero from R4
and the ESR of C6.
Suggested values of C6 are between 47 µF and 100 µF. This
range of values will generally be sufficient to provide desirable