DI-37 Datasheet, PDF (1/2 Pages) Power Integrations, Inc. – 16.5 W DC-DC Converter

Design Idea DI-37
DPA-Switch^™
16.5 W DC-DC Converter
Application
Telecom
Device
DPA424R
Power Output
16.5 W
Input Voltage
36-75 VDC
Output Voltage
Topology
3.3 V
Forward Sync. Rec.
Design Highlights
• Low cost
• 400 kHz synchronous rectification design
• Low component count
• Efficiency – 87% at 48 VDC
• No current sense resistor or current transformer
required
• Output overload, open loop and thermal protection
• Integrated UV meets ETSI standard
Operation
DPA-Switch greatly simplifies the design compared to a
discrete implementation. Resistor R1 programs the under/over
voltages and linearly reduces the maximum duty cycle with
input voltage to prevent core saturation during load transients.
Resistor R3 programs the DPA-Switch current limit to 60%
of nominal to limit fault and overload power. Drain voltage
clamping is provided by Zener diode VR1. Transformer core
reset is controlled by the gate capacitance of Q1.
Resistor R15 charges the gate of Q2, the forward synchronous
rectifier MOSFET. The catch synchronous rectifier MOSFET
(Q1) is directly driven by the transformer (T1) reset voltage and
operates only when Q2 is off. Diode D2 provides a conduction
path for the output inductor (L2) current when the transformer
reset is complete.
+ V_IN
36-75 VDC
L1
1 µH
2.5 A
R1
619 kΩ
1%
C7
1 nF
1.5 kV
R14
10 Ω
R15
10 Ω
C1, C2
1 µF
100 V
T1
Q2
Si4800
DY
DPA-Switch
D
L
U1
CONTROL ^DPA424R
C
S
XF
R4
VR1
1.0 Ω
V_IN
SMBJ
150
C5
R3 ^{220 nF}
11.1 kΩ
1%
C6
68 µF
10 V
Figure 1. DPA424R–16.5 W, 3.3 V, 5 A DC-DC Converter.
L2
D2
B540C
Q1
Si4800
DY
D1
BAV
19WS
C4
4.7 µF
20 V
U2
PC357N1T
C10 C11 C12 C13
100 µF 100 µF 100 µF 1 µF
6.3 V 6.3 V 6.3 V 0805
3.3 V, 5 A
U2
R7
10 kΩ
D3
BAV19WS
R6
150 Ω
C15
10 µF
10 V
U3
LM431AIM3
RTN
R10
3.24 kΩ
1%
C16
100 nF
R12
5.1 Ω
R9
220 Ω
C14
1 µF
R11
10.0 kΩ
1%
PI-3650-072004
DI-37
www.powerint.com
July 2004