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LPM9029C Datasheet, PDF (1/5 Pages) Lowpower Semiconductor inc – Super high density cell design
Preliminary Datasheet
LPM9029C
N and P-Channel Enhancement Power MOSFET
General Description
The LPM9029C integrates N-Channel and P-Channel
enhancement MOSFET Transistor. It uses advanced
trench technology and design to provide excellent
RDS (ON) with low gate charge. This device is suitable
for using in DC-DC conversion, power switch and
charging circuit. Standard Product LPM9029C is
Pb-free and Halogen-free.
Ordering Information
LPM9029C□ □ □
F: Pb-Free
Features
 Trench Technology
 NMOS:
VNDS=30V, IND=12A
RNDS(ON) < 40mΩ @ VGS=2.5V
RNDS(ON) < 20mΩ @ VGS=4.5V
 PMOS:
VPDS=-20V, IPD=-4.5A
RPDS(ON) < 95mΩ @ VGS=-2.5V
RPDS(ON) < 60mΩ @ VGS=-4.5V
 Super high density cell design
 Extremely Low Threshold Voltage
 Small package SOP-8
Package Type
SO: SOP-8
Pin Configurations
SNMOS 1
GNMOS 2
SPMOS 3
LPM9029C
SOP-8
TOP VIEW
8
DNMOS
7
DNMOS
6
DPMOS
Applications
 Driver for Relay, Solenoid, Motor, LED etc.
 DC-DC converter circuit
 Power Switch
 Load Switch
 Charging
Marking Information
Device
LPM9029C
Marking
Package
SOP-8
Shipping
3K/REEL
GPMOS 4
5 DPMOS
Pin Description
Pin Number
1
2
3
4
5,6
7,8
Pin Description
Source Of NMOS
Gate Of NMOS
Source Of PMOS
Gate Of PMOS
Drain Of PMOS
Drain Of NMOS
LPM9029C May.-2014
Email: marketing@lowpowersemi.com
www.lowpowersemi.com
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