FP38 Datasheet, PDF (2/5 Pages) Power-One – Filter & Ring Core Chokes

Accessories
Filter & Ring Core Chokes FP, L and LP Series
Electrical Data Filter Blocks
General Condition: T_A = 25°C unless otherwise specified
Table 2: Filter blocks FP
Characteristics
Conditions
FP38
min typ max
I_Fn Rated current
L = 0.75 L_o
4
U_Fn Rated voltage
T_{C min}...T_{C max}
5
40
R_F Ohmic resistance
18 20 22
L_o No load inductance I_L = 0, T_{C min}...T_{C max} 30 34 38
T_A Ambient temperature I_F = I_Fn
–40
80
T_C Case temperature
–40
92
T_S Storage temperature
–40
100
FP80
min typ max
4
5
80
18 20 22
30 34 38
–40
80
–40
92
–40
100
FP144
min typ max
2
15
144
90 95 100
88 100 112
–40
95
–40
98
–55
100
For currents I_F > 4 A the following derating takes place: T_{A max} = 100 – 1.3 • I_F2 [°C], T_{C max} = 100 – 0.49 • I_F2 [°C]
Unit
A DC
V DC
mý
µH
°C
Input Interference Reduction
An AC ripple current can be measured at the input of any
switching regulator, even if they are equipped with an input
filter. Depending on the types of filters used, common and/
or differential mode interferences can be reduced. They will
also help to further increase the surge and burst immunity
of the power supplies.
The FP filters considerably increase the source impedance
of the regulators superimposed interference, to a value
which is normally high in comparison to the impedance of
the source (Z_Line). The interference currents are therefore
practically independent of their source impedance. The fil-
ter will reduce these currents by approximately 25 dB at a
frequency of 150 kHz.
The interference voltages at the filter input are due to the
remaining interference currents flowing through the source
impedance. The resulting interference voltage reduction
can be seen in the following figure. For frequencies above
the regulator switching frequency the attenuation will in-
crease (up to 2 MHz approx.).
Parallel operation: When several switching regulator inputs
are connected in parallel, each regulator should be
equipped with a separate input filter. Interconnections
should only be made in front of the filter or at its input Uii
(i. e. the central ground point should be before or at the filter
and under no circumstances at the regulator input).
Att. [dB]
inductive
resistive
capacitive
40
12009
Reduction of Output Ripple
Even though switching regulators have an inherently low
output ripple, certain sensitive applications need even fur-
ther reduction. In such cases, the filters designed to reduce
disturbances at the input, can also be used for reducing the
ripple on the output voltage (even better results with regard
to the ripple and dynamic control deviation can be achieved
by using low-loss ring core chokes in combination with an
external capacitor, see below).
The output ripple can be reduced by the use of filter blocks
by about 24 dB. The formula for the ripple u_R at the load R_L
is as follows:
u_R = 0.063 • u_o
(Ripple voltage u_o is given for specific regulators in the cor-
responding data section).
Vi+
Vo+
Uii
Uio
Filter
12010
U
PSR
U_o
Gi
U_R
R_L
Gi–
Go–
Fig. 2
Reduction of voltage interference by FP filters
Consider, that the filter not only affects the output ripple but
can also influence the voltage across the load R_L in the
event of load changes. The static load regulation increases
with the ohmic resistance of the choke i.e. 24 mV/A for the
FP 38 and FP 80 filters and 95 mV/A for the FP 144 filter.
30
20
10
0
Z_Line [ ]
0
1
2
3
4
5
6
Source impedance
Fig. 1
Interference voltage reduction with FP filters at f = 150 kHz
REV. SEP 29, 2003
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