PO100HSTL32A Datasheet, PDF (4/5 Pages) Potato Semiconductor Corporation – Quad Differential LVDS/LVPECL/HSTL to LVTTL Translator

PO100HSTL32A
Quad Differential LVDS/LVPECL/HSTL to LVTTL Translator
04/19/09
Test Waveforms
FIGURE 1.
LVDS/ PECL/ ECL/ HSTL /DIFFERENTIAL INPUT WAVEFORM DEFINITIONS
VCC= 3.3V
VCC
VIH
VPP RANGE
VPP _0V-VCC
VIL
VEE=0.0V
VEE
FIGURE 2.
LVTTL OUTPUT
tr,tf,
VO
FIGURE 3.
Propogation Delay, Output pulse skew, and output-to-output skew for D to output
INPUT
CLOCK
OUTPUT
CLOCK
TPLH
TPD
ANOTHER
OUTPUT
CLOCK
TPHL
VPP
VO
tSK(O)
4
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