PO74HSTL85331A_14 Datasheet, PDF (1/7 Pages) Potato Semiconductor Corporation – 2.3V-3.6V 1:4 Crystal Oscillator/Differential Clock or Data Fanout Buffer

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PO74HSTL85331A
2.3V-3.6V 1:4 Crystal Oscillator/Differential Clock or Data Fanout Buffer
700MHz TTL/CMOS Potato Chip
FEATURES:
DESCRIPTION:
. Patented Technology
The PO74HSTL85331A is a low skew, high performance
. Four HSTL differential outputs
1-to-4 Crystal Oscillator/Differential-to-3.3V HSTL
. Selectable differential CLK, nCLK or crystal inputs ^{fanout buffer of High Performance Clock Solutions from}
. CLK, nCLK pair can accept the following differential ^{PotatoSemi. The PO74HSTL85331A has selectable}
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL ^{differential clock or crystal inputs. The CLK, nCLK pair}
. Operating frequency up to 700MHz with 2pf load
can accept most standard differential input levels. The
. Operating frequency up to 550MHz with 5pf load
clock enable is internally synchronized to eliminate runt
. Operating frequency up to 400MHz with 15pf load ^{pulses on the outputs during asynchronous}
. Very low output pin to pin skew < 50ps
assertion/deassertion of the clock enable pin.
. 3.3-ns propagation delay (typical)
. 2.3V to 3.6V power supply
. Industrial temperature range: –40°C to 85°C
. 20-pin TSSOP package
Guaranteed output and part-to-part skew characteristics
make the PO74HSTL85331A ideal for those applications
demanding well defined performance and repeatability.
. 5000V Human-BodyModel (A114-A)
. 200V MachineModel (A115-A)
Pin Configuration
Logic Block Diagram
GND 1
20 Q0
CLK_EN 2
19 _nQ0
CLK_EN
D
Q
CLK_SEL 3
18
VCC
LE
CLK 4
17 _Q1
CLK
nCLK
0
Q0
nCLK 5
16 _nQ1
CLKIN / XTAL1
CLKOUT / XTAL2
1
nQ0
XTAL1 6
15 _Q2
Q1
XTAL2 7
14 _nQ2
CLK_SEL
nQ1
nc 8
13
VCC
Q2
nQ2
nc 9
12 _Q3
Q3
VCC
10
11 _nQ3
nQ3
Potato Semiconductor Corporation
1
01/01/10