PO100HSTL32A_14 Datasheet, PDF (1/5 Pages) Potato Semiconductor Corporation – High Frequency Noise Canncellation Translator

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PO100HSTL32A
Quad Differential LVDS/LVPECL/HSTL to LVTTL Translator
High Frequency Noise Canncellation Translator
FEATURES:
DESCRIPTION:
• Patented Technology
• Differential LVDS/LVPECL/HSTL to LVTTL
Translator
• Operating frequency up to 1GHz with 2pf load
• Operating frequency up to 800MHz with 5pf load
• Operating frequency up to 450MHz with 15pf load
• Very low output pin to pin skew < 150ps
• Propagation delay < 1.8ns max with 15pf load
• 2.4V to 3.6V power supply
• Industrial temperature range: –40°C to 85°C
• Available in 16-pin SOIC 150ml package
Potato Semiconductor’s PO100HSTL32A is
designed for world top performance using
submicron CMOS technology to achieve 1GHz
LVTTL output frequency with less than 1.8ns
propagation delay.
The PO100HSTL32A is a low-skew, The small
outline 16 pin package and the low skew design to
make it ideal for applica- tions which require the
translation of a clock or a data signal.
Pin Configuration
Logic Block Diagram
1B 1
1A 2
1Y 3
G4
2Y 5
2A 6
2B 7
GND 8
16 V_CC
15 4B
14 4A
13 4Y
12 G
11 3Y
10 3A
9 3B
Pin Description
DIFFERENTIAL INPUT
A, B
V_ID 10 mV
–10 mV < V_ID < 10 mV
V_ID –10 mV
X
Open
ENABLES
G
G
H
X
X
L
H
X
X
L
H
X
X
L
L
H
H
X
X
L
OUTPUT
Y
H
H
?
?
L
L
Z
H
H
4
G
G ¹²
1A ²
1
1B
6
2A
7
2B
3A ¹⁰
9
3B
14
4A
15
4B
3
1Y
5
2Y
11 _3Y
13 _4Y
Potato Semiconductor Corporation
1
01/01/10