PO100HSTL23A Datasheet, PDF (1/6 Pages) Potato Semiconductor Corporation – Dual Differential LVDS/LVPECL/HSTL to LVTTL Translator

PO100HSTL23A
Dual Differential LVDS/LVPECL/HSTL to LVTTL Translator
12/19/07
FEATURES:
DESCRIPTION:
• Patented Technology
• Differential LVDS/LVPECL/HSTL to LVTTL
Translator
• Operating frequency up to 1GHz with 2pf load
• Operating frequency up to 800MHz with 5pf load
• Operating frequency up to 450MHz with 15pf load
• Very low output pin to pin skew < 150ps
• Propagation delay < 1.8ns max with 15pf load
• 2.4V to 3.6V power supply
• Industrial temperature range: –40°C to 85°C
• Available in 8-pin SOIC package
• Available in 8-pin TSSOP package
Potato Semiconductor’s PO100HSTL23A is
designed for world top performance using
submicron CMOS technology to achieve 1GHz
LVTTL output frequency with less than 1.8ns
propagation delay.
The PO100HSTL23A is a low-skew, The small
outline 8 pin package and the low skew design to
make it ideal for applica- tions which require the
translation of a clock or a data signal.
Pin Configuration
D0
1
D0
2
D1
3
D1
4
8
V_CC
7
Q0
6
Q1
5
GND
Logic Block Diagram
D0
D0
Q0
LVDS
LVPEC
LVTTL
HSTL
D1
Q1
D1
Pin Description
Pin
Q0, Q1
D0, D1
D0, D1
V_CC
GND
Function
LVTTL Outputs
Differential
LVDS/LVPECL/HSTL Inputs
Positive Supply
Ground
1
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