English
Language : 

SP701 Datasheet, PDF (2/2 Pages) Polyfet RF Devices – SILICON GATE ENHANCEMENT MODE RF POWER VDMOS TRANSISTOR
SP701
POUT VS PIN GRAPH
SP701 POUT VS PIN Freq=500MHz, VDS=28V, Idq=.2A
30
13.00
25
12.00
Pout
20
11.00
15
10.00
Gain
10
9.00
Efficiency = 55%
5
8.00
0
7.00
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
PIN IN WATTS
IV CURVE
S1A 1 DIE IV
8
7
6
5
4
3
2
1
0
0
2
4
6
8
10
12
14
16
18
20
vg=2v
Vg=4v
VVg=D6SvINVOLTS vg=8v
0
vg=12v
Zin Zout
100
10
1
0
10.00
1.00
0.10
0
CAPACITANCE VS VOLTAGE
S1A 1 DIE CAPACITANCE
Ciss
Coss
Crss
5
10
15
20
25
30
VDS IN VOLTS
ID & GM VS VGS
S1A 1 DIE ID & GM Vs VG
Id
gM
2
4
6
8
10
12
14
Vgs in Volts
PACKAGE DIMENSIONS IN INCHES
Tolerance .XX +/-0.01 .XXX +/-.005 inches
POLYFET RF DEVICES
REVISION 03/28/2001
1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:Sales@polyfet.com URL:www.polyfet.com