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L125 Datasheet, PDF (2/2 Pages) Polyfet RF Devices – SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR
L125
POUT VS PIN GRAPH
L125 POUT VS PIN F=1000 MHZ; IDQ=0.4A; VDS=28V
22
20
18
16
14
12
10
8
6
0
6
Efficiency = 55%
0.2 0.4 0.6 0.8
1
PIN IN WATTS
1.2 1.4 1.6 1.8
POUT
IV CURVE
L2A 1 DICE IV
16.00
14.00
12.00
10.00
8.00
2
GAIN
5
4
3
2
1
0
0
2
4
6
8
10
12
14
16
18
20
VDS IN VOLTS
vg=2v
Vg=4v
Vg=6v
vg=8v
vg=10v
vg=12v
S11 & S22 SMITH CHART
100
10
1
0.1
0
100
CAPACITANCE VS VOLTAGE
L2B 1 DIE CAPACITANCE
Ciss
Coss
Crss
5
10
15
20
25
30
VDS IN VOLTS
ID & GM VS VGS
L2B 1 DIE ID, GM vs VG
10
ID
1
GM
0.1
0
2
4
6
8
10
12
14
Vgs in Volts
PACKAGE DIMENSIONS IN INCHES
Tolerance .XX +/-0.01 .XXX +/-.005 inches
POLYFET RF DEVICES
REVISION 03/08/2001
1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:Sales@polyfet.com URL:www.polyfet.com