F1072 Datasheet, PDF (2/2 Pages) Polyfet RF Devices – PATENTED GOLD METALIZED SILICON GATE ENHANCEMENT MODE RF POWER VDMOS TRANSISTOR

POUT VS PIN GRAPH
F1072
CAPACITANCE VS VOLTAGE
F1072 POUT vs PIN Idq=1.2A F=400 Mhz Vds=28V
180
160
140
120
100
80
60
40
20
0
0
GAIN
POUT
5
Efficiency = 53%
10
15
20
25
30
35
PIN IN WATTS
POUT
GAIN
14
13
12
11
10
9
8
7
6
40
IV CURVE
F1B 3DIE CAPACITANCE
1000
100
Coss
Ciss
10
0
Crss
5
10
15
20
25
30
VDS IN VOLTS
ID AND GM VS VGS
20
18
16
14
12
10
8
6
4
2
0
0
F1B 3DIE IV CURVE
2
4
6
Vg = 2V
Vg = 4V
8
10
12
14
16
Vds in Volts
Vg = 6V
Vg = 8V
Vg = 10V
18
20
Vg = 12V
F1B 3 DIE GM & ID vs VG
100
Id
10
1
Gm
0.1
0
2
4
6
8
10
12
14
Vgs in Volts
S11 AND S22 SMITH CHART
PACKAGE DIMENSIONS IN INCHES
POLYFET RF DEVICES
REVISION 8/1/97
1110 Avenida Acaso, Camarillo, CA 93012 TEL:[phone] FAX:[phone] EMAIL:[e-mail] URL:www.polyfet.com