F1007 Datasheet, PDF (2/2 Pages) Polyfet RF Devices – PATENTED GOLD METALIZED SILICON GATE ENHANCEMENT MODE RF POWER VDMOS TRANSISTOR

POUT VS PIN GRAPH
F1007
CAPACITANCE VS VOLTAGE
45
40
35
30
25
20
15
10
5
0
0
F1007 POUT vs PIN Idq=0.4A F=400 Mhz Vds=28v
Efficiency = 50%
0.5
1
1.5
2
2.5
3
3.5
Pin in Watts
POUT
PIN
14.5
14
13.5
13
12.5
12
11.5
11
10.5
10
4
IV CURVE
F1B 1 DIE Capacitance vs Vds
100
Coss
Ciss
10
Crss
1
0
5
10
15
20
25
30
VDS IN VOLTS
ID AND GM VS VGS
6
5
4
3
2
1
0
0
2
Vg = 2V
F1B 1DIE IV CURVE
4
6
Vg = 4V
8
10
12
14
16
Vds in Volts
Vg = 6V
Vg = 8V
Vg = 10V
18
20
Vg = 12V
F1B 1 DIE GM & ID vs VG
10
Id
1
Gm
0.1
0.01
0
2
4
6
8
10
12
14
Vgs in Volts
S11 AND S22 SMITH CHART
PACKAGE DIMENSIONS IN INCHES
POLYFET RF DEVICES
REVISION 8/1/97
1110 Avenida Acaso, Camarillo, CA 93012 TEL:[phone] FAX:[phone] EMAIL:[e-mail] URL:www.polyfet.com