F1001 Datasheet, PDF (2/2 Pages) Polyfet RF Devices – PATENTED GOLD METALIZED SILICON GATE ENHANCEMENT MODE RF POWER VDMOS TRANSISTOR

POUT VS PIN GRAPH
F1001
CAPACITANCE VS VOLTAGE
35
30
25
20
15
10
5
0
0
F1001 POUT vs PIN IDQ=0.1A; F=175 MHZ VDS=28V
Efficiency = 75%
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
PIN IN WATTS
POUT
GAIN
20
19
18
17
16
15
14
13
12
11
10
2
IV CURVE
F1B 1 DIE Capacitance vs Vds
100
Coss
Ciss
10
Crss
1
0
5
10
15
20
25
30
VDS IN VOLTS
ID AND GM VS VGS
6
5
4
3
2
1
0
0
2
Vg = 2V
F1B 1DIE IV CURVE
4
6
Vg = 4V
8
10
12
Vds in Volts
Vg = 6V
Vg = 8V
14
16
Vg = 10V
18
20
Vg = 12V
F1B 1 DIE GM & ID vs VG
10
Id
1
Gm
0.1
0.01
0
2
4
6
8
10
12
14
Vgs in Volts
S11 AND S22 SMITH CHART
PACKAGE DIMENSIONS IN INCHES
POLYFET RF DEVICES
REVISION 8/1/97
1110 Avenida Acaso, Camarillo, CA 93012 TEL:[phone] FAX:[phone] EMAIL:[e-mail] URL:www.polyfet.com