PM5356 Datasheet, PDF (8/307 Pages) PMC-Sierra, Inc – 622 Mbit/s ATM Physical Layer Device

RELEASED
S/UNI-622-MAX
DATASHEET
PMC-1980589
ISSUE 6
PMC-Sierra, Inc.
PM5356
S/UNI-622-MAX
SATURN USER NETWORK INTERFACE (622-MAX)
LIST OF TABLES
TABLE 1: POINTER INTERPRETER EVENT (INDICATIONS) DESCRIPTION......................................... 48
TABLE 2: POINTER INTERPRETER TRANSITION DESCRIPTION ......................................................... 50
TABLE 3: REGISTER MEMORY MAP ....................................................................................................... 63
TABLE 4: TEST MODE REGISTER MEMORY MAP ............................................................................... 227
TABLE 5: INSTRUCTION REGISTER (LENGTH - 3 BITS) ..................................................................... 230
TABLE 6: S/UNI-622-MAX IDENTIFICATION REGISTER ....................................................................... 230
TABLE 7: S/UNI-622-MAX BOUNDARY SCAN REGISTER .................................................................... 230
TABLE 8: SETTINGS FOR SONET OR SDH OPERATION..................................................................... 244
TABLE 9: RECOMMENDED BERM SETTINGS ...................................................................................... 246
TABLE 10: PATH RDI AND EXTENDED RDI REGISTER SETTINGS ..................................................... 246
TABLE 11: 1+1 APS REGISTER 0X06 SETTINGS .................................................................................. 253
TABLE 12: ABSOLUTE MAXIMUM RATINGS ......................................................................................... 272
TABLE 13: D.C CHARACTERISTICS ...................................................................................................... 273
TABLE 14: MICROPROCESSOR INTERFACE READ ACCESS (FIGURE 35) ....................................... 276
TABLE 15: MICROPROCESSOR INTERFACE WRITE ACCESS (FIGURE 36) ..................................... 278
TABLE 16: RSTB TIMING (FIGURE 37) .................................................................................................. 280
TABLE 17: TRANSMIT PARALLEL LINE INTERFACE TIMING (FIGURE 38) ......................................... 281
TABLE 18: RECEIVE PARALLEL LINE INTERFACE TIMING (FIGURE 39) ........................................... 282
TABLE 19: RECEIVE SERIAL LINE INTERFACE TIMING (FIGURE 40)................................................. 283
TABLE 20: TRANSMIT UTOPIA LEVEL 2 SYSTEM INTERFACE TIMING (FIGURE 41) ........................ 284
TABLE 21: RECEIVE UTOPIA LEVEL 2 SYSTEM INTERFACE TIMING (FIGURE 42) .......................... 286
TABLE 22: TRANSMIT UTOPIA LEVEL 3 SYSTEM INTERFACE TIMING (FIGURE 43) ........................ 288
TABLE 23: RECEIVE UTOPIA LEVEL 3 SYSTEM INTERFACE TIMING (FIGURE 44) .......................... 290
TABLE 24: CLOCK AND FRAME PULSE INTERFACE TIMING (FIGURE 45) ........................................ 291
TABLE 25: JTAG PORT INTERFACE (FIGURE 46)................................................................................. 292
TABLE 26: ORDERING INFORMATION .................................................................................................. 294
TABLE 27: THERMAL INFORMATION..................................................................................................... 294
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE iv