PM5343STXC Datasheet, PDF (76/198 Pages) PMC-Sierra, Inc – SONET/SDH TRANSPORT OVERHEAD TRANSCEIVER TELECOM STANDARD PRODUCT

DATA SHEET
PMC-930303
ISSUE 6
PM5343 STXC
SONET/SDH TRANSPORT OVERHEAD TRANSCEIVER
Address 08H: RLOP Control/Status
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R
R
Function
BIPWORD
ALLONES
AISDET
RDIDET
BIPWORDO
Unused
LAISV
RDIV
Default
0
0
0
0
0
X
X
X
RDIV:
The RDIV bit is set high when line RDI is detected. Line RDI is detected
when a 110 binary pattern is detected in bits 6, 7, and 8, of the K2 byte for
three or five consecutive frames (as selected by the RDIDET bit in this
register). Line RDI is removed when any pattern other than 110 is detected
for three or five consecutive frames. This alarm indication is also available on
output RDI.
LAISV:
The LAISV bit is set high when line AIS is detected. Line AIS is detected
when a 111 binary pattern is detected in bits 6, 7, and 8, of the K2 byte for
three or five consecutive frames (as selected by the AISDET bit in this
register). Line AIS is removed when any pattern other than 111 is detected
for three or five consecutive frames. This alarm indication is also available on
output LAIS.
BIPWORDO:
The BIPWORDO bit controls the indication of B2 errors on the B2E output.
When BIPWORDO is logic one, the B2E output is asserted for once per
frame whenever one or more B2 bit errors occur during that frame. When
BIPWORDO is logic zero, the B2E output is asserted once for every B2 bit
error that occurs during that frame ( the BIPE output can be asserted up to
8xN BIPECLK periods, for N=1, or 3). The accumulation of B2 error events
functions independently from the B2E output indication, and is controlled by
the BIPWORD register bit.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 62