RM7000 Datasheet, PDF (49/54 Pages) PMC-Sierra, Inc – RM7000™ Microprocessor with On-Chip Secondary Cache Datasheet Released

RM7000™ Microprocessor with On-Chip Secondary Cache Datasheet
Released
11 Timing Diagrams
11.1 Clock Timing
Figure 12 Clock Timing
SysClock
t_Rise t_Fall
t_High t_Low
±t_JitterIn
System Interface Timing (SysAD, SysCmd, ValidIn*, ValidOut*, etc.)
Figure 13 Input Timing
SysClock
Data
t_DS
t_DH
Data
Figure 14 Output Timing
SysClock
Data
t_DOmax
t_DOmin
Data
Data
Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
49
Document ID: PMC-2002175, Issue 1