PM8620 Datasheet, PDF (28/190 Pages) PMC-Sierra, Inc – 20G Narrowband Switch Element

NSE-20G™ Standard Product Data Sheet
Preliminary
Pad Name
Type
Pin No.
TP[15]
TN[15]
TP[16]
Analog
LVDS
Output
AF1
AF2
AG2
TN[16]
AG3
TP[17]
AJ33
TN[17]
AJ32
TP[18]
AH34
TN[18]
AH33
TP[19]
AH32
TN[19]
AH31
TP[20]
AF34
TN[20]
AF33
TP[21]
AB34
TN[21]
AB33
TP[22]
AB32
TN[22]
AB31
TP[23]
AA33
TN[23]
AA32
TP[24]
Y34
TN[24]
Y33
TP[25]
T34
TN[25]
T33
TP[26]
R32
TN[26]
R31
TP[27]
R34
TN[27]
R33
TP[28]
P33
TN[28]
P32
TP[29]
K33
TN[29]
K32
TP[30]
J32
TN[30]
J31
TP[31]
J34
TN[31]
J33
TP[32]
H33
TN[32]
H32
NSE-20G Control and Clocking (5 Balls)
SYSCLK
Input
A16
Function
System Clock. The system clock signal (SYSCLK) is the
master clock for the NSE-20G device. SYSCLK must be
a 77.76 MHz clock, with a nominal 50% duty cycle.
CMP and RC1FP are sampled on the rising edge of
SYSCLK.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
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Document ID: PMC-2000170, Issue 3