PM7346 Datasheet, PDF (211/419 Pages) PMC-Sierra, Inc – SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

DATASHEET
PMC-960835
ISSUE 6
PM7346 S/UNI-QJET
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
Register 048H, 148H, 248H, 348H: J2-FRMR Error/Xbit Interrupt Enable
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
CRCEE
FRMEE
BPVE
EXZE
XBITE
Unused
XBIT_DEB
XBIT_THR
Default
0
0
0
0
0
X
0
0
CRCEE
When CRCEE is logic 1, the J2-FRMR will generate an interrupt if a
multiframe fails its CRC-5 check.
FRMEE
When FRMEE is logic 1, the J2-FRMR will generate an interrupt upon the
reception of an errored framing bit.
BPVE
When BPVE is logic 1, the J2-FRMR will generate an interrupt upon the
reception of a bipolar violation which is not part of a valid B8ZS code (when
UNI is set to logic 0 in the J2-FRMR Configuration Register) or on the
reception of a logic 1 on RLCV (when UNI is set to logic 1).
EXZE
When EXZE is logic 1, the J2-FRMR will generate an interrupt upon the
reception of a string of eight-or-more consecutive zeroes. EXZE has no effect
when UNI is set to logic 1 in the J2-FRMR Configuration Register.
XBITE
When XBITE is logic 1, the J2-FRMR will generate an interrupt when any of
the x-bits (X1, X2, X3) change state. Because the XBIT interrupt is generated
when the x-bit indications change, the interrupt is debounced along with them
via the XBIT_DEB and XBIT_THR bits.
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 190