MSP2006 Datasheet, PDF (2/2 Pages) PMC-Sierra, Inc – MSP for Wireless Routers and Access Points

MSP2006 Multi-Service Processor
MSP for Wireless Routers and Access Points
ELECTRICAL
• 276 pin PBGA
• Vcc 3.3V I/O, 1.8V core
• Power consumption 1.0W
SYSTEM PROCESSOR
• High performance MIPS32 4Km
processor at
• 170 MHz
• 16 KB instruction cache, 16 KB data
cache
• Ultrafast Multi-Service Bus (MS Bus)
• Peak bandwidth of 4.25 Gbit/s
• True parallel processing
LAN INTERFACE
• 2 Independent 10/100 Ethernet MACs
• MII/RMII
• VLAN support
HIGH-PERFORMANCE BUSES
• Flexible external local bus interface
• Up to 25 Mbit/s data throughput
• PCI interface (32-bit, 33MHz)
• PCI V2.1 and V2.2 compatible
SYSTEM CONTROL
• Four interrupt inputs
• 40 GPIOs
• MIPS timer, 2 system timers, and
watchdog timer
• Block copy engine
MISCELLANEOUS INTERFACES
• 2 UARTs
• SPI/MPI
• Two-wire serial
MEMORY CONTROLLER
• Glueless interface to 256 MB of
SDRAM
• Glueless interface to 32 MB of flash
SOFTWARE
• APIs: Block copy
• Board support package
• 802.11 Drivers
DEVELOPMENT TOOLS
• Support for Linux and VxWorks
• Evaluation boards
• Third party tool chains
THIRD PARTY SUPPORT
• WLAN Applications
• Instant 802 Networks
• EJTAG Debuggers
• EPI - MAJIC probe
• WindRiver - visionICE II
Head Office:
PMC-Sierra, Inc.
8555 Baxter Place
Burnaby, B.C. V5A 4V7
Canada
Tel: [phone]
Fax: [phone]
To order documentation,
send email to:
[e-mail]
or contact the head office,
Attn: Document Coordinator
All product documentation is available
on our web site at:
http://www.pmc-sierra.com
For corporate information,
send email to:
[e-mail]
PMC-2041687 (R1)
© Copyright PMC-Sierra, Inc. 2004. All
rights reserved.
For a complete list of PMC-Sierra’s
trademarks and registered trademarks,
visit: http://www.pmc-sierra.com/legal/
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE