PM7800 Datasheet, PDF (1/2 Pages) PMC-Sierra, Inc – Digital Correction Signal Processor

Preliminary
Digital Correction Signal Processor
PM7800
PALADIN-10
FEATURES
• Digitial Adaptive Pre-Distortion for
wideband linearization of power
amplifiers in wireless basestations.
• Digitial Correction for Analog
Quadrature Modulation Distortion.
• Digital Soft Pre-compression for
efficiency management.
• Input Signal Bandwidth up to 10 MHz.
Sample rate up to 80 MHz.
• Programmable, variable input data
rate.
• 16-bit microprocessor bus interface for
adaptive control processor
compensation engine.
• Serial interface (configurable to SPI or
I2C operation) for update of power and
carrier values.
• 48 general-purpose IO pins, eight of
which are edge-triggered interrupt
sources.
• Standard five-signal IEEE 1149.1
JTAG test port for boundary scan
board test purposes.
PACKAGING
• Low-power 1.8 V CMOS core logic
with 3.3 V CMOS/TTL compatible
digital inputs and digital outputs.
• Industrial temperature range (-40 °C to
+85 °C).
• 304-pin SBGA with a body size of
31mm x 31mm.
APPLICATIONS
• Multi-carrier WCDMA Base
Transceiver Subsystems (BTS).
• CDMA2000 BTS (requires firmware
upgrade).
• GSM/TDMA/EDGE BTS (requires
firmware upgrade).
BLOCK DIAGRAM
DCLK
REFCLK
CPUCLK
RESET_N
VREF
SCS_N
SD
SCLK
HOP_N
VOBS
PALADIN-10 Padring
PALADIN-10
JTAG
PALADIN-10 Core
Input Module
Pre-
Predistorter
Circuitry
Predistortion
Filter
Modulation
Circuitry
VD
Capture
Module
CPU
Interface
GPIO
PMC-2001613 (P1)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
© Copyright PMC-Sierra, Inc. 2000