PM5342-1 Datasheet, PDF (1/2 Pages) PMC-Sierra, Inc – SONET/SDH Payload Extractor/Aligner

PMC-Sierra,Inc.
SONET/SDH Payload Extractor/Aligner
FEATURES
• Monolithic, SONET/SDH Payload
Extractor/Aligner for use in STS-1
(STM-0/AU3), STS-3 (STM-1/AU3) or
STS-3c (STM-1/AU4) interface
applications, operating at serial interface
speeds up to 155.52 Mbit/s.
• Provides integrated clock recovery and
clock synthesis to allow a direct interface
to optical modules.
• Provides termination for SONET Section
and Line, SDH Regenerator Section and
Multiplexer Section transport overhead,
and Path overhead of one or three
STS-1 (STM-0/AU3) paths or a single
STS-3c (STM-1/AU4) path.
• Maps one or three STS-1 (STM-0/AU3)
payloads or a single STS-3c (STM-1/
AU4) payload to system timing
reference, accommodating
plesiochronous timing offsets between
the references through pointer
processing.
• Maps three DS3 bit streams into a
STS-3 (STM-1/AU3) frame.
• Maps three serial data streams (e.g.,
Frame Relay, PPP, or Ethernet
Payload) into a single serial data
stream into a STS-1 (STM-0/AU3) or
STS-3c (STM-1/AU4) payload.
• Supports line loopback from the line
side receive stream to the transmit
stream and diagnostic loopback from a
Telecom ADD bus interface to a
Telecom DROP bus interface.
• Provides a standard 5-signal P1149.1
JTAG test port for boundary scan
board test purposes.
• Provides a generic 8-bit
microprocessor bus interface for
configuration, control, and status
monitoring.
• Low power, +5 V, CMOS technology.
Device has PECL- and TTL-
compatible inputs and TTL outputs.
BLOCK DIAGRAM
PM5342
SPECTRA™-155
• Available in a 256-pin, Super Ball Grid
Array (SBGA) package.
• Supports industrial temperature range
(-40°C to 85°C) operation.
BACKPLANE/DEVICE MODES
• Telecom Byte.
• Telecom Nibble.
• Telecom Serial.
• Datacom Byte.
• Datacom Nibble.
• Datacom Serial.
• Datacom T3.
APPLICATIONS
• SONET/SDH Add/Drop Multiplexers
• SONET/SDH Terminal Multiplexers
• SONET/SDH Digital Cross-Connects
• Channelized Routers and Switches
• Packet Over SONET Router and
Switches
Transmit Ring
Control Port
Transmit
O/H
Insert
Serial
Control
Port
JTAG
Test Access
Port
TRCLK+
TRCLK-
TXC
TXD+
TXD-
TBYP
TATP
RATP
RBYP
RXD+
RXD-
RRCLK+
RRCLK-
ALOS+
ALOS-
Transmit
Line
Interface
Clock
Synthesis
Transmit
Section O/H
Processor
Transmit
Line O/H
Processor
Receive
Line
Interface
Clock &
Data
Recovery
Section
Trace
Buffer
Receive
Section O/H
Processor
Receive
Line O/H
Processor
Transmit Path O/H
Processor #1
Transmit Path O/H
Processor #2
Transmit Path O/H
Processor #3
Path
Trace
Buffer
#1
Path
Trace
Buffer
#2
Path
Trace
Buffer
#3
Receive Path O/H
Processor #1
Receive Path O/H
Processor #2
Receive Path O/H
Processor #3
Transmit Telecom
Aligner #1
Transmit Telecom
Aligner #2
Transmit Telecom
Aligner #3
Receive Telecom
Aligner #1
Receive Telecom
Aligner #2
Receive Telecom
Aligner #3
Receive Ring
Control Port
Transmit
O/H
Extract
Microprocessor
Interface
3
Add Bus PRBS
Generator/
3
Monitor
DS3 Mapper
Add Side #1
DS3 Mapper
Add Side #2
3
DS3 Mapper
Add Side #3
Transmit
Pointer
Interpreter #1
Transmit
Pointer
3
Interpreter #2
Transmit
Pointer
Interpreter #3
3
Drop Bus PRBS
Generator/
3
Monitor
DS3 Mapper
Drop Side #1
DS3 Mapper
3
Drop Side #2
DS3 Mapper
Drop Side #3
SMODE[2:0]
SS[34:0]
PMC-1970791 (R3)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
 Copyright PMC-Sierra, Inc. 2001