PM5309 Datasheet, PDF (1/2 Pages) PMC-Sierra, Inc – Multi-rate Telecom Backplane SERDES for 2.5 Gbit/s Interconnect

Released
PM5309
TBS 2488
Multi-rate Telecom Backplane SERDES for 2.5 Gbit/s Interconnect
FEATURES
• Provides two pages of connection
• High-speed serial RASIO compatible
• High performance backplane interface
and cross-connect for 2.5G line cards in
SONET/SDH systems.
• Provides one low-speed parallel
TelecomBus interface operating at
32 bits x 77.76 MHz.
• Provides three high-speed multi-rate
serial backplane interfaces.
memory with software and hardware
controlled hitless page swaps at frame
boundaries.
• Provides integrated delay management
that allows for arbitrary SONET/SDH
frame alignments on each ingress serial
link.
SERIAL PORT FUNCTIONS
with CML, LVDS, and LVPECL.
• Supports nibble and di-bit slicing on
622 Mbit/s links for sliced switching
architectures.
PARALLEL PORT FUNCTIONS
• Supports one 32-bit or four 8-bit
77.76 MHz TelecomBus interfaces to
interface with parallel TelecomBus
• Supports CLOS and memory-based
• Supports three RASIO 3G high-speed
framers and mappers.
switch fabric systems.
serial backplane interfaces for interfacing • Integrated pointer interpreter reduces
• Supports linear, UPSR, and BLSR
with SONET/SDH cross-connects,
complexity of external framers and
protection strategies.
framers, mappers, and other
mappers by asserting payload, J0, and
SWITCHING CAPACITY
TBS™ 2488 devices.
• Each high-speed serial backplane
• Implements a 10G memory switch fabric _{interface is capable of independent}
with STS-1/AU-3 switching granularity in _{operation at 4x622 Mbit/s scrambled}
a single device.
NRZ SONET/SDH, 4x777 Mbit/s Serial
• Supports non-blocking anycast switching _{TelecomBus, or 1x2488 Mbit/s}
J1 indications on the outgoing
TelecomBus interface.
• Allows insertion and extraction of TOH
bytes through a dedicated low speed
serial interface.
between any of the serial or parallel
scrambled NRZ SONET/SDH.
interfaces.
BLOCK DIAGRAM
RxP1[4:1]
RxN1[4:1]
Rx RASIO
ESSI
Link
Framing &
Monitoring
Pointer
Interpreter
& Delay
Mgmt
RxP2[4:1]
RxN2[4:1]
Rx RASIO
ESSI
Link
Framing &
Monitoring
Pointer
Interpreter
& Delay
Mgmt
STS-1 / AU-3
Cross-Connect
ESSI
Link
Generator
Tx
RASIO
TxP1[4:1]
TxN1[4:1]
ESSI
Link
Generator
Tx
RASIO
TxP2[4:1]
TxN2[4:1]
RxP3[4:1]
RxN3[4:1]
Rx RASIO
SYSCLK
OD[4:1][7:0]
ODP[4:1]
OPL[4:1]
OJ0J1[4:1]
OPAIS[4:1]
ESSI
Link
Framing &
Monitoring
TelecomBus
Monitor &
Byte
Interleave
Pointer
Interpreter
& Delay
Mgmt
ITOHFP
ITOHCLK
ITOHD
ITOHEN
Overhead
Insert
JTAG
Interface
Microprocessor
Interface
Connection
Memory and
Control
ESSI
Link
Generator
Tx
RASIO
TxP3[4:1]
TxN3[4:1]
TelecomBus
Signal
Generator &
Byte De-
Interleave
CSU (3)
Overhead
Extract
OD[4:1][7:0]
ODP[4:1]
OPL[4:1]
OJ0J1[4:1]
OPAIS[4:1]
OTOHD
OTOHFP
OTOHCLK
PMC-2021208 (R4)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
© Copyright PMC-Sierra, Inc. 2005