PM4341A Datasheet, PDF (1/2 Pages) PMC-Sierra, Inc – T1 TRANSCEIVER

PM4341A _T1XC
Summary Information
T1 TRANSCEIVER
FEATURES
• Monolithic single chip device which
integrates a full featured T1 framer
with an on-chip analog line interface.
• Supports SF, ESF, T1DM (DDS) and
SLC®96 format DS1 signals.
Supports unframed mode. Supports
B8ZS or AMI line codes.
• Recovers clock and data from the
incoming DSX-1 signal, generates
DSX-1 output signal.
• Supports transfer of PCM and
signalling to/from 1.544 Mbit/s and
2.048 Mbit/s backplane buses.
Supports gapped data streams used
in higher rate multiplexing.
• Provides robbed bit signalling
insertion/extraction, idle code
substitution, digital milliwatt code
substitution, data inversion and 2
superframes of signalling debounce
on a per channel basis.
• Pin compatible with the PM6341
E1XC E1 Transceiver.
• Software compatible with the
PM4344 TQUAD Quad T1 Framer
and PM4388 TOCTL Octal T1
Framer.
• Provides an 8-bit microprocessor bus
interface for configuration, control
and status monitoring.
• Low-power 5V CMOS technology.
• Avalable in a high density 80-pin (14
by14mm) PQFP or in a 68-pin PLCC
package.
APPLICATIONS
• T1 & T3 Multiplexers
• T1 Frame Relay Interfaces
• T1 ATM UNI Interfaces
• Fractional T1
• T1 Channel Service Units (CSUs)
and Data Service Units (DSUs)
• Digital Access and Cross-Connect
Systems (DACS) and Electronic
Digital Cross-Connects (EDSX)
• Digital Loop Carriers (DLCs)
• SONET Add-Drop Multiplexers
(ADM)
• ISDN Primary Rate Interfaces (PRI)
• Digital Private Branch Exchanges
(PBX)
• T1 & T3 Test Equipment
SLC®96 is a registered trademark of AT&T
RECEIVE SECTION
• Provides loss of signal, red alarm,
yellow alarm and AIS alarm
indication. Detects violations of the
ANSI T1.403 12.5% pulse density
rule over a moving 192 bit window.
• Supports line and path performance
monitoring per Bellcore, AT&T and
ANSI recommendations.
• Accumulators are provided for ESF
CRC-6 and framing bit errors, Line
Code Violations and Loss Of Frame
or Change Of Frame Alignment
events.
• Extracts the data link in ESF, T1DM
and SLC®96 formats. Extracts the
D-channel for primary rate interfaces.
• Provides ESF bit-oriented code
detection and an HDLC interface for
terminating the ESF datalink.
• Provides a 2 frame elastic store for
jitter and wander attenuation.
• Detects programmable in-band
loopback codes.
BLOCK DIAGRAM
TRANSMIT SECTION
• Provides per channel minimum ones
density through Bell (Bit 7), GTE or
DDS zero code suppression.
• Detects violations of the ANSI T1.403
12.5% pulse density rule over a
moving 192 bit window.
• Inserts the data link in ESF, T1DM
and SLC®96 formats. Inserts the D-
channel for primary rate interfaces.
• Generates AIS and yellow alarm in
all formats.
• Inserts the data link in ESF, T1DM
and SLC®96 formats. Inserts the D-
channel for primary rate interfaces.
• Generates ESF bit-oriented codes
and provides an HDLC interface for
generating the ESF datalink.
• Inserts programmable in-band
loopback codes.
• Provides a FIFO buffer for jitter
attenuation and rate conversion.
TCLKI
BT PCM /BTD P
B T S IG /B T D N
BTFP
BTCL K
A(7-0)
RDB
WRB
CSB
ALE
IN T B
RSTB
D(7-0)
BRCLK
BRFPI
XCLK/VCLK
RAS
REF
RRC
RCLKI
RDP/RDD/
SDP
RD N /RL C V /
SDN
BT IF
BACK-
PLANE
T R A N S M IT
INTER-
FACE
XBAS
B A S ICT R A N S M IT TE R :
FRAME GENERATION,
ALARM INSERTION,
TRUNK CONDITIONING
LINE CODING
TPSC
PER-CHAN
CO NT:
SIG ,ID L E,
ZERO CONT
X IB C
IN -B A N D
LOOPBACK
CO DE
GENERATOR
M P IF
M ICRO -
PROCESS-
OR
IN T E R F A C E
XPDE
PULSE
DE N S IT Y
ENFORCER
XBOC
BIT -
ORIENTED
CODE GEN.
XFDL
HDLC
TRANS-
M IT T E R
TOPS
TIM ING OPTIONS
DJAT
DIGITAL JITTER
ATTENUATOR
TR A N S M ITT E R
XPLS
ANALO G DSX-1
PULSE
GENERATOR
DT IF
DIGITAL DS-1
TRANSMIT
IN T E R F A C E
TAP
TAN
TC
TCLKO
T D P /T D D
T DN /T F LG
TDLCLK/
TDLUDR
TDLSIG/
TDLINT
R E C E IV E R
RSLC
ANALOG
DSX-1 PULSE
SLICER
DR IF
DIG ITA L
DS-1 RX
INTER-
FACE
CDRC
CLOCK AND
DATA
RECOVERY
IB C D
IN-BAND
LOOPBACK
CODE
DETECTOR
PDVD
PULSE
DE N S IT Y
VIO LATION
DETECTOR
PMON
PER-
FORMANCE
M O N IT O R
CO UNTERS
ELST
E L A S T IC
STORE
S IG X
SIG NA LLING
EXTRACT-
OR
FRMR
F RAM ER:
FRAME
ALIGNM ENT,
ALARM
EXTRACT
AL M I
ALARM
INT E -
GRATOR
FRAM
FRAMER/
SLIP BUFFER
RAM
RPSC
P E R -C H A N N E L
CONTROL:
TRUNK
CO ND ITIO N
RB O C
BIT -
ORIENTED
CODE
DETECTOR
RFDL
HDLC
RE C E IV E R
BRIF
BACK-
PLANE
RE C E IV E
INTER-
FACE
BRPCM /BRDP
B R S IG /B RD N
BRFPO
RDPCM /RPCM
RCLKO
RFP
RD LS IG /
RDLINT
RDLCLK/
RDLEOM
PMC-920108(R7)
© 1998 PMC-Sierra, Inc. March, 1998