PCI9050 Datasheet, PDF (1/2 Pages) PLX Technology – Bus Target Interface Chip

Features
I PCI Specification 2.1
Compliant Target Interface
Chip supporting low cost
slave adapters
I Up to five local bus address
spaces and four chip selects
I Bi-directional FIFO for zero
wait-state burst operation
I PCI Bus transfers up to
132 Mbytes/second
I Supports multiplexed and
non-multiplexed 8-, 16-, and
32-bit generic local buses
I Local bus runs asynchro-
nously to the PCI clock
I Supports Big/Little Endian
byte conversion
I Low power CMOS in
160-pin PQFP package
PCI 9050
Bus Target Interface Chip
Overview
As PCI gains momentum as the preeminent backplane standard, suppliers of
add-in cards of all types are rushing to get PCI versions to market. Continuing
its drive to provide single-chip PCI interfaces for every market, PLX offers
designers its PCI 9050 Bus Target Interface Chip for low cost adapters.
The PCI 9050 provides a compact, high performance PCI bus target (slave)
interface for adapter boards. It enables rapid, low cost conversion of Industry
Standard Architecture (ISA) adapters to the PCI bus. The PCI 9050 accelerates I/O
data movements on adapter boards from ISA’s nominal bus speed of 8 MHz,
5 Mbytes/second to PCI’s 33 MHz, 132 Mbytes/second data transfer capability.
For designers looking for a simple and painless way to convert their ISA
adapters, PLX offers the PCI 9050 RDK! It includes a PCI board designed with the
PCI 9050 chip, I/O daughter card connector for standard or custom functions, a
breadboard area, test headers, and a piggyback ISA slot that enables existing ISA
boards to be plugged into the PCI 9050 for software and hardware implementa-
tion. The PCI 9050RDK also includes a set of development software tools, includ-
ing PLXMon™ for PCI bus monitoring and debug, and example serial/modem
device drivers for Windows 95.™
Direct Slave PCI Interface Chip
Speeds the Inevitable
Disappearance of the ISA Bus