PLL620-28 Datasheet, PDF (1/6 Pages) PhaseLink Corporation – Low Phase Noise VCXO (for 100-200MHz Fund Xtal)

PLL620-28/-29
Low Phase Noise VCXO (for 100-200MHz Fund Xtal)
FEATURES
• 100MHz to 200MHz Fundamental Mode Crystal.
• Output range: 100 – 200MHz (no PLL).
• Low Injection Power for crystal 50uW.
• Sub 0.5pS RMS phase jitter ( 12kHz to 20MHz ).
• PECL (PLL620-28) or LVDS output (PLL620-29).
• Supports 2.5V or 3.3V-Power Supply.
• Available in 16-Pin TSSOP.
DESCRIPTION
The PLL620-28/-29 family of XO ICs is specifically
designed to work with high frequency fundamental
and third overtone crystals. They achieve very low
current into the crystal, resulting in better stability.
Their very low jitter makes them ideal for the most
demanding timing requirements.
PIN CONFIGURATION
(Top View)
BLOCK DIAGRAM
Oscillator
XIN ^Amplifier
XOUT
OE
Q
Q
PLL620-28/-29
OUTPUT ENABLE LOGICAL LEVELS
Part #
PLL620-28
PLL620-29
OE
0 (Default)
1
0
1 (Default)
State
Output enabled
Tri-state
Tri-state
Output enabled
OE input: Logical states defined by PECL levels for PLL620-28
Logical states defined by CMOS levels for PLL620-29
47745 Fremont Blvd., Fremont, California 94538 Tel [phone] Fax [phone] www.phaselink.com Rev 07/08/05 Page 1