PLL602-89 Datasheet, PDF (1/5 Pages) PhaseLink Corporation – 12-27 MHz XO IC with 1 Pair of LVDS and 1 CMOS Outputs

PLL602-89
12-27 MHz XO IC with 1 Pair of LVDS and 1 CMOS Outputs
FEATURES
• Low jitter XO for the 12MHz to 27MHz range.
• Integrated crystal load capacitor: no external
load capacitor required.
• 1 pair of LVDS outputs and 1 CMOS output.
• 12-27 MHz fundamental crystal input.
• Low jitter (RMS): 2.5 ps period jitter (1 sigma).
• 2.5V to 3.3V operation.
• Available in 8-Pin SOIC package.
PIN CONFIGURATION
(Top View)
VDD 1
XIN ²
XOUT 3
GND 4
8 CMOS_CLK
7 LVDSBAR_CLK
6 LVDS_CLK
5 _GND
(8 pin SOIC)
DESCRIPTION
The PLL602-89 is a high performance multiple output XO IC chip. It provides 1 pair of LVDS and 1 CMOS outputs.
The chip combines a crystal oscillator (XO) with a multiple-output buffer. It accepts a low cost fundamental parallel
resonant mode crystal from 12MHz to 27MHz, which is reproduced at the outputs. The very low jitter (2.5 ps RMS
period jitter) makes this chip ideal for data and telecommunication applications.
BLOCK DIAGRAM
XIN
XOUT
Oscillator
Amplifier
CMOS_CLK
LVDS_CLK
LVDSBAR_CLK
47745 Fremont Blvd., Fremont, California 94538 Tel [phone] Fax [phone] www.phaselink.com Rev 09/03/04 Page 1