PLL520-70 Datasheet, PDF (1/5 Pages) PhaseLink Corporation – CMOS Low Phase Noise VCXO (for 45-90MHz Fund Xtal)

Preliminary PLL520-70
CMOS Low Phase Noise VCXO (for 45-90MHz Fund Xtal)
FEATURES
• 45MHz to 90MHz Fundamental Mode Crystal.
• Output range: 45MHz – 90MHz (no PLL).
• CMOS outputs.
• Integrated variable capacitors.
• Supports 3.3V-Power Supply.
• Available in die form.
• Thickness 10 mil.
DESCRIPTIONS
PLL520-70 is a VCXO IC specifically designed to
pull frequency fundamental crystals from 45MHz to
90MHz, with CMOS outputs. Its design was
optimized to tolerate higher limits of interelectrodes
capacitance and bonding capacitance to improve
yield. It achieves very low current into the crystal
resulting in better overall stability. Its internal
varicaps allow an on chip frequency pulling,
controlled by the VCON input.
BLOCK DIAGRAM
VCON ^Oscillator
Amplifier
X+
w/
integrated
varicaps
X-
OE
Q
PLL520-70
DIE CONFIGURATION
65 mil
25
24 23 22 21
20
19
18
26
(1550,1475)
17
16
15
27
14
28
13
29
12
11
30
10
31
9
1 23 4 5
6
78
Y
(0,0)
X
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
62 x 65 mil
GND
80 micron x 80 micron
10 mil
DRIVE_SEL AND OE_CTRL TABLE
Pad #19
DRIVE_SEL
0
1
Output Drive
High Drive CMOS
Standard CMOS (default)
Pad #30
OE_CTRL
0
1
State
Tri-state
Output enabled (default)
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
Rev 8/26/02 Page 1