PLL520-28-29 Datasheet, PDF (1/7 Pages) PhaseLink Corporation – Low Phase Noise VCXO (for 120-200MHz Fund Xtal)

PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
FEATURES
• 120MHz to 200MHz Fundamental Mode Crystal.
• Output range: 120 – 200MHz (no PLL).
• Low Injection Power for crystal 50uW.
• Sub 0.5pS RMS phase jitter ( 12kHz to 20MHz ).
• PECL (PLL520-28) or LVDS output (PLL520-29).
• Integrated variable capacitors.
• Supports 2.5V or 3.3V-Power Supply.
• Available in 16-Pin (TSSOP or 3x3mm QFN).
DESCRIPTION
The PLL520-28/-29 are a family of VCXO IC’s
specifically designed to pull high frequency
fundamental crystals. They achieve very low current
into the crystal resulting in better overall stability.
Their internal varicaps allow an on chip frequency
pulling, controlled by the VCON input. Their very
low jitter makes them ideal for the most demanding
timing requirements.
BLOCK DIAGRAM
VCON ^Oscillator
Amplifier
XIN
w/
integrated
varicaps
XOUT
OE
Q
Q
PLL520-28/-29
PIN CONFIGURATION
(Top View)
VDD 1
XIN 2
XOUT 3
N/C 4
N/C 5
OE 6
VCON 7
GND 8
16 N/C
15 N/C
14 GND
13 CLKC
12 VDD
11 CLKT
10 N/C
9 N/C
XIN
XOUT
N/C
OE
12 11 10 9
13
8
14
7
P520-2x
15
6
16
5
1234
GND
CLKC
VDD
CLKT
OUTPUT ENABLE LOGICAL LEVELS
Part #
OE
State
PLL520-28
0 (Default) Output enabled
1
Tri-state
PLL520-29
0
Tri-state
1 (Default) Output enabled
OE input: Logical states defined by PECL levels for PLL520-28
Logical states defined by CMOS levels for PLL520-29
47745 Fremont Blvd., Fremont, California 94538 Tel [phone] Fax [phone] www.phaselink.com Rev 09/20/04 Page 1