PLL501-22 Datasheet, PDF (1/5 Pages) PhaseLink Corporation – 27MHz Multiple Output VCXO with Audio Clock

Preliminary PLL501-22
27MHz Multiple Output VCXO with Audio Clock
FEATURES
• 2 VCXO outputs at 27MHz (27MHz crystal input).
• Selectable Audio Clocks supporting:
32kHz, 44.1kHz, 48kHz, 64kHz and 96kHz
sampling rates
256, 384 and 512 oversampling ratios
8.192, 11.2896, 12.288, 16.9344, 16.384,
18.432, 22.5792, 24.576MHz audio frequencies
• +/- 120ppm pull range
• Power down tri-state selector.
• 3.3V Operating Voltage.
• No external load capacitor or varicap required.
• Available in 16-Pin SSOP.
DESCRIPTION
The PLL501-22 is a low cost integrated VCXO IC with
power down feature, designed to work with a
fundamental 27MHz crystal in order to provide most
common audio clocks (8.192, 11.2896, 12.288,
16.9344, 16.384, 18.432, 22.5792, and 24.576MHz)
required by sampling rates of 32kHz, 44.1kHz, 48kHz,
64kHz and 96kHz (256, 384 and 512 oversampling
ratios). The audio clock follows the pulled 27MHz
signal of the VCXO. The wide pull-range makes it
ideal for STB and MPEG Video applications.
PACKAGE PIN CONFIGURATION
XIN 1
XOUT 2
VDD 3
VDD 4
VIN 5
GND 6
GND 7
PDOWN^
8
16 S1^
15 27MHz
14 VDD
13 S0^
12 27MHz
11 GND
10 ACLK
9 S2^
XIN = 27 MHz
Note: ^: Internal pull-up resistor. The internal pull-up resistor
results in a default high value when no pull-down resistor is
connected to this pin.
AUDIO CLOCK SELECTION
S2 S1 S0
ACLK (MHz)
0
0
0
8.192
0
0
1
11.2896
0
1
0
12.288
0
1
1
16.9344
1
0
0
18.432
1
0
1
16.384
1
1
0
22.5792
1
1
1
24.576
BLOCK DIAGRAM
[S2-S0]
Vin
Audio
PLL
Xin
Xout
VCXO
ACLK
PDOWN
27MHz
27MHz
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
Rev 02/26/04 Page 1