SQ3345DES Datasheet, PDF (6/7 Pages) Pletronics, Inc. – 5.0 V CMOS Clock Oscillators

SQ33D Series 5.0 V
CMOS Clock Oscillators
January 2006
Mechanical:
Cover:
Kovar
Electroless Nickel Plated
1 μinch (25 μm) typical
Resistance welded to base
Base:
Kovar
Glass to metal sealed leads
Pin 4 Connected to case
Label:
White Kapton with Black Letters
–or--
Blue Epoxy heat cure ink with laser
marked lettering
Not to scale
Inches
mm
A 0.487 +_0.005 12.37 +_0.13
B 0.487 +_0.005 12.37 +_0.13
C 0.225 +_0.011 5.72 +_0.28
D¹ 0.250
6.35
E¹ 0.020
0.51
F¹ 0.031
0.79
G¹ 0.094
2.37
H¹ 0.300
7.62
I¹ 0.200
7.62
J¹ 0.094
2.37
1 _{Nominal dimension}
Pad Function
1 Output
Enable/Disable
4 Ground (GND)
5 Output
8 Supply Voltage
(V_CC)
Note
When this pad is not connected the oscillator shall operate.
When this pad is logic low the output will be inhibited (high impedance state.)
Recommend connecting this pad to V_CC if the oscillator is to be always on.
Recommend connecting appropriate power supply bypass capacitors as close as
possible.
Layout and application information
For Optimum Jitter Performance, Pletronics recommends:
• a ground plane under the device
• no large transient signals (both current and voltage) should be routed under the device
• do not layout near a large magnetic field such as a high frequency switching power supply
• do not place near piezoelectric buzzers or mechanical fans.
www.pletronics.com
425-776-1880
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