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PAS109B Datasheet, PDF (9/15 Pages) Pixart Imaging Inc. – PAS109BC QQVGA COLOR CMOS IMAGE SENSOR PAS109BB QQVGA MONO CMOS IMAGE SENSOR
PixArt Imaging Inc.
PAS109B
5.3 I2C Bus Timing
CMOS Image Sensor IC
SDA
tf
SCL
S
tLOW
tr
tf
tSU;DAT
tHD;STA
tSP
tr
tBUF
tHD;STA
tHD;DAT
tHIGH
tSU;STA
Sr
tSU;STO
P
S
Fig 5.4 I2C Bus Timing
5.4 I2C Bus Timing Specification
PARAMETER
SYMBOL
SCL clock frequency
Hold time (repeated) START condition.
After this period, the first clock pulse is generated.
Low period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time. For I2C-bus device
Data set-up time
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Set-up time for STOP condition
Bus free time between a STOP and START
Capacitive load for each bus line
Noise margin at LOW level for each connected
device (including hysteresis)
Noise margin at HIGH level for each connected
device (including hysteresis)
Note: It depends on the "high" period time of SCL.
fscl
tHD:STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
tr
tf
tSU;STO
tBUF
Cb
VnL
VnH
STANDARD-MODE
MIN.
10
4.0
MAX.
400
-
4.7
-
0.75
-
4.7
-
0
3.45
250
-
30
N.D.
30
N.D.
4.0
-
4.7
-
1
15
0.1 VDD
-
0.2 VDD
-
UNIT
kHz
us
us
us
us
us
ns
ns(note1)
ns(note1)
us
us
pF
V
V
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PixArt Imaging Inc.
E-mail: fae_service@pixart.com.tw
V1.1, Mar. 2002